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74VHCT08AM Datasheet

  • 74VHCT08AM

  • QUAD 2-INPUT AND GATE

  • 7頁(yè)

  • STMICROELECTRONICS   STMICROELECTRONICS

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廬
74VHCT08A
QUAD 2-INPUT AND GATE
s
s
s
s
s
s
s
s
s
s
HIGH SPEED: t
PD
= 4.7 ns (TYP.) at V
CC
= 5V
LOW POWER DISSIPATION:
I
CC
= 2
碌A(chǔ)
(MAX.) at T
A
= 25
o
C
COMPATIBLE WITH TTL OUTPUTS:
V
IH
= 2V (MIN), V
IL
= 0.8V (MAX)
POWER DOWN PROTECTION ON INPUTS &
OUTPUTS
SYMMETRICAL OUTPUT IMPEDANCE:
|I
OH
| = I
OL
= 8 mA (MIN)
BALANCED PROPAGATION DELAYS:
t
PLH
鈮?/div>
t
PHL
OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 4.5V to 5.5V
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 08
IMPROVED LATCH-UP IMMUNITY
LOW NOISE: V
OLP
= 0.8V (Max.)
M
(Micro Package)
T
(TSSOP Package)
ORDER CODES :
74VHCT08AM
74VHCT08AT
The internal circuit is composed of 2 stages
including buffer output, which provide high noise
immunity and stable output.
Power down protection is provided on all inputs
and outputs and 0 to 7V can be accepted on
inputs with no regard to the supply voltage. This
device can be used to interface 5V to 3V.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
DESCRIPTION
The 74VHCT08A is an advanced high-speed
CMOS QUAD 2-INPUT AND GATE fabricated
with sub-micron silicon gate and double-layer
metal wiring C
2
MOS technology.
PIN CONNECTION AND IEC LOGIC SYMBOLS
August 1999
1/7

74VHCT08AM 產(chǎn)品屬性

  • 55

  • 集成電路 (IC)

  • 邏輯 - 柵極和逆變器

  • 74VHCT

  • 與門(mén)

  • 4

  • 2

  • -

  • 4.5 V ~ 5.5 V

  • 2µA

  • 8mA，8mA

  • 0.8V

  • 2V

  • 7.9ns @ 5V，50pF

  • -40°C ~ 85°C

  • 表面貼裝

  • 14-SOIC

  • 14-SOIC（0.154"，3.90mm 寬）

  • 管件

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