74VHC4316 Quad Analog Switch with Level Translator
April 1994
Revised April 1999
74VHC4316
Quad Analog Switch with Level Translator
General Description
These devices are digitally controlled analog switches
implemented in advanced silicon-gate CMOS technology.
These switches have low 鈥渙n鈥?resistance and low 鈥渙ff鈥?leak-
ages. They are bidirectional switches, thus any analog
input may be used as an output and vice-versa. Three sup-
ply pins are provided on the 4316 to implement a level
translator which enables this circuit to operate with 0V鈥?V
logic levels and up to
鹵6V
analog switch levels. The 4316
also has a common enable input in addition to each
switch's control which when HIGH will disable all switches
to their off state. All analog inputs and outputs and digital
inputs are protected from electrostatic damage by diodes
to V
CC
and ground.
Features
s
Typical switch enable time: 20 ns
s
Wide analog input voltage range:
鹵6V
s
Low 鈥渙n鈥?resistance: 50 typ. (V
CC
鈭扸
EE
=
4.5V)
30 typ. (V
CC
鈭扸
EE
=
9V)
s
Low quiescent current: 80
碌A(chǔ)
maximum (74VHC)
s
Matched switch characteristics
s
Individual switch controls plus a common enable
s
Pin functional compatible with 74HC4316
Ordering Code:
Order Number
74VHC4316M
74VHC4316WM
74VHC4316MTC
74VHC4316N
Package Number
M16A
M16B
MTC16
N16E
Package Description
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter 鈥淴鈥?to the ordering code.
Truth Table
Inputs
E
H
L
L
CTL
X
L
H
Switch
I/O鈥揙/I
鈥淥FF鈥?/div>
鈥淥FF鈥?/div>
鈥淥N鈥?/div>
Connection Diagram
Top View
Logic Diagram
漏 1999 Fairchild Semiconductor Corporation
DS011678.prf
www.fairchildsemi.com
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