74VHC27 Triple 3-Input NOR Gate
July 1994
Revised April 1999
74VHC27
Triple 3-Input NOR Gate
General Description
The VHC27 is an advanced high speed CMOS 3-Input
NOR Gate fabricated with silicon gate CMOS technology. It
achieves the high-speed operation similar to equivalent
Bipolar Schottky TTL while maintaining the CMOS low
power dissipation.
The internal circuit is composed of 3 stages including buffer
output, which provide high noise immunity and stable out-
put. An input protection circuit insures that 0V to 7V can be
applied to the input pins without regard to the supply volt-
age. This device can be used to interface 5V to 3V systems
and two supply systems such as battery backup. This cir-
cuit prevents device destruction due to mismatched supply
and input voltages.
Features
s
High speed: t
PD
=
4.1 ns (typ) at T
A
=
25擄C
s
Low power dissipation: I
CC
=
2
碌A(chǔ)
(max) at T
A
=
25擄C
s
High noise immunity: V
NIH
=
V
NIL
=
28% V
CC
(min)
s
Power down protection is provided on all inputs
s
Low noise: V
OLP
=
0.8V (max)
s
Pin and function compatible with 74HC27
Ordering Code:
Order Number
74VHC27M
74VHC27SJ
74VHC27MTC
74VHC27N
Package Number
M14A
M14D
MTC14
N14A
Package Description
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter 鈥淴鈥?to the ordering code.
Logic Symbol
IEEE/IEC
Connection Diagram
Pin Descriptions
Pin Names
A
n
, B
n
, C
n
Y
n
Description
Inputs
Outputs
Truth Table
A
H
X
X
L
X
=
Don't Care
B
X
H
X
L
C
X
X
H
L
Y
L
L
L
H
漏 1999 Fairchild Semiconductor Corporation
DS011682.prf
www.fairchildsemi.com
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