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74VHC16245TTR Datasheet

  • 74VHC16245TTR

  • 16-BIT BUS TRANSCEIVER

  • 252.38KB

  • 10頁

  • STMICROELECTRONICS   STMICROELECTRONICS

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74VHC16245
16-BIT BUS TRANSCEIVER
WITH 3-STATE OUTPUTS (NON INVERTED)
s
s
s
s
s
s
s
s
s
HIGH SPEED: t
PD
= 4.0 ns (TYP.) at V
CC
= 5V
LOW POWER DISSIPATION:
I
CC
= 4
碌A(chǔ)
(MAX.) at T
A
=25擄C
HIGH NOISE IMMUNITY
V
NIH
=V
NIL
= 28% VCC (MIN.)
POWER DOWN PROTECTION ON INPUTS
& OUTPUTS
SYMMETRICAL OUTPUT IMPEDANCE:
|I
OH
| = I
OL
= 8 mA (MIN)
BALANCED PROPAGATION DELAYS:
t
PLH
鈮?/div>
t
PHL
OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 2V to 5.5V
IMPROVED LATCH-UP IMMUNITY
LOW NOISE: V
OLP
= 0.9V (MAX.)
TSSOP
ORDER CODES
PACKAGE
TSSOP
TUBE
T&R
74VHC16245TTR
PIN CONNECTION
DESCRIPTION
The 74VHC16245 is an advanced high-speed
CMOS 16-BIT BUS TRANSCEIVER (3-STATE)
fabricated with sub-micron silicon gate and
double-layer metal wiring C
2
MOS technology.
This IC is intended for two-way asynchronous
communication between data busses; the
direction of data transmission is determined by
DIR input. The enable input G can be used to
disable the device so that the busses are
effectively isolated.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
All floating bus terminals during High Z State must
be held HIGH or LOW.
July 2003
1/10

74VHC16245TTR 產(chǎn)品屬性

  • 2,000

  • 集成電路 (IC)

  • 邏輯 - 緩沖器，驅(qū)動器，接收器，收發(fā)器

  • 74VHC

  • 收發(fā)器，非反相

  • 2

  • 8

  • 8mA，8mA

  • 2 V ~ 5.5 V

  • -55°C ~ 125°C

  • 表面貼裝

  • 48-TFSOP（0.240"，6.10mm 寬）

  • 48-TSSOP

  • 帶卷 (TR)

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