74VHC02 Quad 2-Input NOR Gate
November 1992
Revised February 2005
74VHC02
Quad 2-Input NOR Gate
General Description
The VHC02 is an advanced high-speed CMOS 2-Input
NOR Gate fabricated with silicon gate CMOS technology. It
achieves the high-speed operation similar to equivalent
Bipolar Schottky TTL while maintaining the CMOS low
power dissipation. The internal circuit is composed of 3
stages, including buffer output, which provide high noise
immunity and stable output. An input protection circuit
insures that 0V to 7V can be applied to the input pins with-
out regard to the supply voltage. This device can be used
to interface 5V to 3V systems and two supply systems such
as battery backup. This circuit prevents device destruction
due to mismatched supply and input voltages.
Features
s
High Speed: t
PD
3.6 ns (typ) at V
CC
V
NIL
5V
25
q
C
s
Low power dissipation: I
CC
s
High noise immunity: V
NIH
s
Low noise: V
OLP
2
P
A (max) at T
A
28% V
CC
(min)
s
Power down protection is provided on all inputs
0.8V (max)
s
Pin and function compatible with 74HC02
Ordering Code:
Order Number
74VHC02M
74VHC02MX_NL
(Note 1)
74VHC02SJ
74VHC02MTC
74VHC02MTCX_NL
(Note 1)
74VHC02N
Package
Number
M14A
M14A
M14D
MTC14
MTC14
N14A
Package Description
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
Pb-Free 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Pb-Free 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
Wide
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter 鈥淴鈥?to the ordering code.
Pb-Free package per JEDEC J-STD-020B.
Note 1:
鈥淿NL鈥?indicates Pb-Free package (per JEDEC J-STD-020B). Device available in Tape and Reel only.
Logic Symbol
IEEE/IEC
Connection Diagram
Truth Table
Pin Descriptions
Pin Names
A
n
, B
n
O
n
Description
Inputs
Outputs
A
L
L
H
H
B
L
H
L
H
O
H
L
L
L
漏 2005 Fairchild Semiconductor Corporation
DS011515
www.fairchildsemi.com
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