74VCXH162244 Low Voltage 16-Bit Buffer/Line Driver with Bushold
January 2000
Revised March 2000
74VCXH162244
Low Voltage 16-Bit Buffer/Line Driver with Bushold
and 26鈩?Series Resistor in Outputs
General Description
The VCXH162244 contains sixteen non-inverting buffers
with 3-STATE outputs to be employed as a memory and
address driver, clock driver, or bus oriented transmitter/
receiver. The device is nibble (4-bit) controlled. Each nibble
has separate 3-STATE control inputs which can be shorted
together for full 16-bit operation. .
The VCXH162244 data inputs include active bushold cir-
cuitry, eliminating the need for external pull-up resistors to
hold unused or floating data inputs at a valid logic level
The 74VCXH162244 is also designed with 26鈩?series
resistors in the outputs. This design reduces line noise in
applications such as memory address drivers, clock driv-
ers, and bus transceivers/transmitters.
The 74VCXH162244 is designed for low voltage (1.65V to
3.6V) V
CC
applications with output capability up to 3.6V.
The 74VCXH162244 is fabricated with an advanced CMOS
technology to achieve high speed operation while maintain-
ing low CMOS power dissipation.
Features
s
1.65V鈥?.6V V
CC
supply operation
s
3.6V tolerant control inputs and outputs
s
Bushold on data inputs eliminates the need for external
pull-up/pull-down resistors
s
26鈩?series resistors in outputs
s
t
PD
3.3 ns max for 3.0V to 3.6V V
CC
3.8 ns max for 2.3V to 2.7V V
CC
7.6 ns max for 1.65V to 1.95V V
CC
s
Static Drive (I
OH
/I
OL
)
鹵12
mA @ 3.0V V
CC
鹵8
mA @ 2.3V V
CC
鹵3
mA @ 1.65V V
CC
s
Uses patented noise/EMI reduction circuitry
s
Latch-up performance exceeds 300 mA
s
ESD performance:
Human body model
>
2000V
Machine model
>
200V
Ordering Code:
Order Number
74VCXH162244MTD
74VCXH162244MTX
(Note 1)
Package
Number
MTD48
MTD48
Package Description
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
[TUBES]
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
[TAPE and REEL]
Note 1:
Use this Order Number to receive devices in Tape and Reel.
Logic Symbol
Pin Descriptions
Pin Names
OE
n
I
0
鈥揑
15
O
0
鈥揙
15
Description
Output Enable Input (Active LOW)
Bushold Inputs
Outputs
漏 2000 Fairchild Semiconductor Corporation
DS500231
www.fairchildsemi.com