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74VCX16841MTD Datasheet

  • 74VCX16841MTD

  • Low Voltage 20-Bit Transparent Latch with 3.6V Tolerant Inpu...

  • 68.59KB

  • 7頁

  • FAIRCHILD

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74VCX16841 Low Voltage 20-Bit Transparent Latch with 3.6V Tolerant Inputs and Outputs
March 1998
Revised April 1999
74VCX16841
Low Voltage 20-Bit Transparent Latch with 3.6V Tolerant
Inputs and Outputs
General Description
The VCX16841 contains twenty non-inverting latches with
3-STATE outputs and is intended for bus oriented applica-
tions. The device is byte controlled. The flip-flops appear
transparent to the data when the Latch enable (LE) is
HIGH. When LE is LOW, the data that meets the setup time
is latched. Data appears on the bus when the Output
Enable (OE) is LOW. When OE is HIGH, the outputs are in
a high impedance state.
The 74VCX16841 is designed for low voltage (1.65V to
3.6V) V
CC
applications with I/O compatibility up to 3.6V.
The 74VCX16841 is fabricated with an advanced CMOS
technology to achieve high speed operation while maintain-
ing low CMOS power dissipation.
Features
s
1.65V鈥?.6V V
CC
supply operation
s
3.6V tolerant inputs and outputs
s
t
PD
(D
n
to O
n
)
3.0 ns max for 3.0V to 3.6V V
CC
3.4 ns max for 2.3V to 2.7V V
CC
6.8 ns max for 1.65V to 1.95V V
CC
s
Power-off high impedance inputs and outputs
s
Supports live insertion and withdrawal (Note 1)
s
Static Drive (I
OH
/I
OL
)
鹵24
mA @ 3.0V V
CC
鹵18
mA @ 2.3V V
CC
鹵6
mA @ 1.65V V
CC
s
Uses patented noise/EMI reduction circuitry
s
Latch-up performance exceeds 300 mA
s
ESD performance:
Human body model
>
2000V
Machine model
>
200V
Note 1:
To ensure the high-impedance state during power up or power
down, OE should be tied to V
CC
through a pull-up resistor; the minimum
value of the resistor is determined by the current-sourcing capability of the
driver.
Ordering Code:
Order Number
74VCX16841MTD
Package Number
MTD56
Package Description
56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Device also available in Tape and Reel. Specify by appending suffix letter 鈥淴鈥?to the ordering code.
Logic Symbol
Pin Descriptions
Pin Names
OE
n
LE
n
D
0
鈥揇
19
O
0
鈥揙
19
Description
Output Enable Input (Active LOW)
Latch Enable Input
Inputs
Outputs
漏 1999 Fairchild Semiconductor Corporation
DS500132.prf
www.fairchildsemi.com

74VCX16841MTD 產(chǎn)品屬性

  • 34

  • 集成電路 (IC)

  • 邏輯 - 鎖銷

  • 74VCX

  • D 型透明鎖存器

  • 10:10

  • 三態(tài)

  • 1.4 V ~ 3.6 V

  • 2

  • 1ns

  • 24mA，24mA

  • -40°C ~ 85°C

  • 表面貼裝

  • 56-TFSOP（0.240"，6.10mm 寬）

  • 56-TSSOP

  • 管件

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