74VCX16721 Low Voltage 20-Bit D-Type Flip-Flops with 3.6V Tolerant Inputs and Outputs
March 1998
Revised April 1999
74VCX16721
Low Voltage 20-Bit D-Type Flip-Flops with 3.6V Tolerant
Inputs and Outputs
General Description
The VCX16721 contains twenty non-inverting D-type flip-
flops with 3-STATE outputs and is intended for bus oriented
applications.
The 74VCX16721 is designed for low voltage (1.65V to
3.6V) V
CC
applications with I/O compatibility up to 3.6V.
The 74VCX16721 is fabricated with an advanced CMOS
technology to achieve high speed operation while maintain-
ing low CMOS power dissipation.
Features
s
1.8V鈥?.6V V
CC
supply operation
s
3.6V tolerant inputs and outputs
s
t
PD
(CLK to O
n
)
3.5 ns max for 3.0V to 3.6V V
CC
4.4 ns max for 2.3V to 2.7V V
CC
8.8 ns max for 1.65V to 1.95V V
CC
s
Power-off high impedance inputs and outputs
s
Supports live insertion and withdrawal (Note 1)
s
Static Drive (I
OH
/I
OL
)
鹵24
mA @ 3.0V V
CC
鹵18
mA @ 2.3V V
CC
鹵6
mA @ 1.65V V
CC
s
Uses patented noise/EMI reduction circuitry
s
Latch-up performance exceeds 300 mA
s
ESD performance:
Human body model
>
2000V
Machine model
>
200V
Note 1:
To ensure the high-impedance state during power up or power
down, OE should be tied to V
CC
through a pull-up resistor; the minimum
value of the resistor is determined by the current-sourcing capability of the
driver.
Ordering Code:
Order Number
74VCX16721MTD
Package Number
MTD56
Package Description
56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Device also available in Tape and Reel. Specify by appending suffix letter 鈥淴鈥?to the ordering code.
Logic Symbol
Pin Descriptions
Pin Names
OE
CLK
D
0
鈥揇
19
O
0
鈥揙
19
CE
Description
Output Enable Input (Active LOW)
Clock Input
Inputs
Outputs
Clock Enable Input (Active LOW)
漏 1999 Fairchild Semiconductor Corporation
DS500143.prf
www.fairchildsemi.com