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t
PHL
OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 4.5V to 5.5V
IMPROVED LATCH-UP IMMUNITY
S
(SOT23-5L)
C
(SC-70)
ORDER CODE:
74V1T14S
74V1T14C
interface 5V to 3V.
Pin configuration and function are the same as
those of the V1G04 but the V1G14 has
hysteresis.
The schmitt trigger function allows it to be used
on line receivers with slow rise/fall input signals.
DESCRIPTION
The 74V1T14 is an advanced high-speed CMOS
SINGLE SCHMITT INVERTER fabricated with
sub-micron silicon gate and double-layer metal
wiring C
2
MOS technology.
The internal circuit is composed of 3 stages
including buffer output, which provide high noise
immunity and stable output.
Power down protection is provided on input and 0
to 7V can be accepted on input with no regard to
the supply voltage. This device can be used to
PIN CONNECTION AND IEC LOGIC SYMBOLS
October 1999
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