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74V1G07S Datasheet

  • 74V1G07S

  • SINGLE BUFFER OPEN DRAIN

  • 7頁

  • STMICROELECTRONICS   STMICROELECTRONICS

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廬
74V1G07
SINGLE BUFFER (OPEN DRAIN)
PRELIMINARY DATA
s
s
s
s
s
s
HIGH SPEED: t
PD
= 6.1 ns (TYP.) at V
CC
= 5V
LOW POWER DISSIPATION:
I
CC
= 1
碌A
(MAX.) at T
A
= 25
o
C
HIGH NOISE IMMUNITY:
V
NIH
= V
NIL
= 28% V
CC
(MIN.)
POWER DOWN PROTECTION ON INPUT
OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 2V to 5.5V
IMPROVED LATCH-UP IMMUNITY
S
(SOT23-5L)
C
(SC-70)
ORDER CODE:
74V1G07S
74V1G07C
Power down protection is provided on input and 0
to 7V can be accepted on input with no regard to
the supply voltage. This device can be used to
interface 5V to 3V.
DESCRIPTION
The 74V1G07 is an advanced high-speed CMOS
SINGLE BUFFER (OPEN DRAIN) fabricated with
sub-micron silicon gate and double-layer metal
wiring C
2
MOS technology.
The internal circuit is composed of 2 stages
including buffer output, which provide high noise
immunity and stable output.
PIN CONNECTION AND IEC LOGIC SYMBOLS
October 1999
1/7

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