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74OL6000_05 Datasheet

  • 74OL6000_05

  • OPTOPLANAR HIGH-SPEED LOGIC-TO-LOGIC OPTOCOUPLERS

  • 15頁(yè)

  • FAIRCHILD

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OPTOPLANAR
廬
HIGH-SPEED
LOGIC-TO-LOGIC OPTOCOUPLERS
TTL BUFFER
TTL INVERTER
CMOS BUFFER
CMOS INVERTER
SYMBOL
74OL6000
74OL6001
74OL6010
74OL6011
LSTTL TO
PACKAGE
6
1
6
BUFFER
1
INVERTER
6
1
DESCRIPTION
OPTOLOGIC鈩?is the 鏗乺st family of truly logic compatible optically coupled logic interface gates.
The family consists of four device types offering LSTTL to TTL and LSTTL to CMOS interfacing. Each of these interfacing functions
is available as a buffer (A=B), or as an inverter (A=B).
The LSTTL input compatibility is provided by an input integrated circuit, with industry standard logic levels. This input ampli鏗乪r IC
switches a temperature compensated current source driving a high speed 850 nm AlGaAs LED emitter. This novel integration
scheme eliminates CTR degradation over time and temperature.
The emitter is optically coupled to an integrated photodetector/high-gain, high-speed output ampli鏗乪r IC. The superior 15kV/碌S
common-mode noise rejection is ensured through the use of an optically transparent noise shield.
The TTL compatible output has a totem-pole with a fan-out of 10. The CMOS compatible output has an open collector Schottky-
clamped transistor that interfaces to any CMOS logic between 4.5 and 15 volts. The 74OL6010/11 may also by used to drive power
MOSFETS or transistors up to 15 volts.
The Optologic coupler family typically offers propagation of delays of 60 ns and can support 15 MBaud data communication.
The two input chips and the output chip are assembled in a 6-pin DIP high insulation voltage plastic package. Fairchild鈥檚 proprietary
OPTOPLANAR
廬
construction provides a withstand test voltage of 5300 VRMS (1 minute).
FEATURES
鈥?Industry 鏗乺st LSTTL to TTL and LSTTL to CMOS complete
logic-to-logic optocoupler
鈥?Incorporates LED drive circuitry 鈥?use as logic gate
鈥?Very high speed
鈥?Choice of buffer or inverter
鈥?Choice of TTL or CMOS compatible output up to 15 volts
鈥?Fan-out of 10 TTL loads, fan-in 1 LSTTL load
鈥?Internal noise shield 鈥?very high CMR of 鹵15 kV/碌S
鈥?UL recognized (File #E90700)
鈥?Same noise immunity as LSTTL/TTL.
APPLICATIONS
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
Transmission line interface 鈥?receiver and driver
Excellent as bridged receiver in fast LAN highways
Bus interface
Logic family interface with ground loop noise elimination
High speed AC/DC voltage sensing
Driver for power semiconductor devices
Level shifting
Replaces fast pulse transformers
漏 2005 Fairchild Semiconductor Corporation
Page 1 of 15
9/6/05

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