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74LVX574M Datasheet

  • 74LVX574M

  • Low Voltage Octal D-Type Flip-Flop with 3-STATE Outputs

  • 83.61KB

  • 6頁

  • FAIRCHILD

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74LVX574 Low Voltage Octal D-Type Flip-Flop with 3-STATE Outputs
June 1993
Revised March 1999
74LVX574
Low Voltage Octal D-Type Flip-Flop with
3-STATE Outputs
General Description
The LVX574 is a high-speed octal D-type flip-flop which is
controlled by an edge-triggered clock input (CP) and a buff-
ered common Output Enable (OE) input. When the OE
input is HIGH, the eight outputs are in a high impedance
state. The LVX574 is functionally identical to the LVX374
but with inputs and outputs on opposite sides of the pack-
age. The inputs tolerate up to 7V allowing interface of 5V
systems to 3V systems.
Features
s
Input voltage translation from 5V to 3V
s
Ideal for low power/low noise 3.3V applications
s
Guaranteed simultaneous switching noise level and
dynamic threshold performance
Ordering Code:
Order Number
74LVX574M
74LVX574SJ
74LVX574MTC
Package Number
M20B
M20D
MTC20
Package Description
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300鈥?Wide
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter 鈥淴鈥?to the ordering code.
Logic Symbol
Connection Diagram
Pin Descriptions
Pin Names
D
0
鈥揇
7
CP
OE
O
0
鈥揙
7
Data Inputs
Clock Pulse Input
3-STATE Output Enable Input
3-STATE Outputs
Description
漏 1999 Fairchild Semiconductor Corporation
DS500050.prf
www.fairchildsemi.com

74LVX574M 產(chǎn)品屬性

  • 1,080

  • 集成電路 (IC)

  • 邏輯 - 觸發(fā)器

  • 74LVX

  • 標準

  • D 型總線

  • 三態(tài)非反相

  • 1

  • 8

  • 125MHz

  • 8.5ns

  • 正邊沿

  • 4mA，4mA

  • 2 V ~ 3.6 V

  • -40°C ~ 85°C

  • 表面貼裝

  • 20-SOIC（0.295"，7.50mm 寬）

  • 管件

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