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74LVTH16501MTD Datasheet

  • 74LVTH16501MTD

  • Low Voltage 18-Bit Universal Bus Transceivers with 3-STATE O...

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74LVTH16501 Low Voltage 18-Bit Universal Bus Transceivers with Bushold and 3-STATE Outputs
March 2001
Revised March 2001
74LVTH16501
Low Voltage 18-Bit Universal Bus Transceivers
with Bushold and 3-STATE Outputs
General Description
The LVTH16501 is an 18-bit universal bus transceiver
combining D-type latches and D-type flip-flops to allow
data flow in transparent, latched, and clocked modes.
Data flow in each direction is controlled by output-enable
(OEAB and OEBA), latch-enable (LEAB and LEBA), and
clock (CLKAB and CLKBA) inputs.
The LVTH16501 data inputs include bushold, eliminating
the need for external pull-up resistors to hold unused
inputs.
The transceiver is designed for low voltage (3.3V) V
CC
applications, but with the capability to provide a TTL inter-
face to a 5V environment. The LVTH16501 is fabricated
with an advanced BiCMOS technology to achieve high
speed operation similar to 5V ABT while maintaining low
power dissipation.
Features
s
Input and output interface capability to systems at
5V V
CC
s
Bushold data inputs eliminate the need for external
pull-up resistors to hold unused inputs
s
Live insertion/extraction permitted
s
Power up/down high impedance provides glitch-free bus
loading
s
Outputs source/sink
鈭?/div>
32 mA/
+
64 mA
s
Functionally compatible with the 74 series 16501
s
ESD Performance:
Human-Body Model
>
2000V
Machine Model
>
200V
Charged-Device Model
>
1000V
Ordering Code:
Order Number
74LVTH16501MEA
74LVTH16501MTD
Package Number
MS56A
MTD56
Package Description
56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300 Wide
56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter 鈥淴鈥?to the ordering code.
漏 2001 Fairchild Semiconductor Corporation
DS500101
www.fairchildsemi.com

74LVTH16501MTD 產(chǎn)品屬性

  • 34

  • 集成電路 (IC)

  • 邏輯 - 通用總線函數(shù)

  • 74LVTH

  • 通用總線收發(fā)器

  • -

  • 18 位

  • 32mA，64mA

  • 2.7 V ~ 3.6 V

  • -40°C ~ 85°C

  • 表面貼裝

  • 56-TFSOP（0.240"，6.10mm 寬）

  • 56-TSSOP

  • 管件

74LVTH16501MTD相關(guān)型號(hào)PDF文件下載

  • 型號(hào)
    版本
    描述
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  • 英文版
    Quad 2-input NAND gate
    PHILIPS
  • 英文版
    Quad 2-input NAND gate
    PHILIPS [P...
  • 英文版
    Quad 2-input NOR gate
    Philips
  • 英文版
    Quad 2-input NAND gate
    Philips
  • 英文版
    Hex inverter
    Philips
  • 英文版
    Quad 2-input AND gate
    Philips
  • 英文版
    Triple 3-input NAND gate
    Philips
  • 英文版
    Triple 3-input AND gate
    Philips
  • 英文版
    Hex inverting Schmitt-trigger
    Philips
  • 英文版
    Dual 4-input NAND gate
    Philips
  • 英文版
    Triple 3-input NOR gate
    Philips
  • 英文版
    Quad 2-input OR gate
    Philips
  • 英文版
    Dual D-type flip-flop with set and reset; positive-edge trig...
    PHILIPS
  • 英文版
    Dual D-type flip-flop with set and reset; positive-edge trig...
    PHILIPS [NXP Se...
  • 英文版
    Quad 2-input EXCLUSIVE-OR gate
    Philips
  • 英文版
    QUADRUPLE 2 INPUT POSITIVE NAND GATES
    TI [Texas ...
  • 英文版
    Quad 2-input NAND gate
    PHILIPS
  • 英文版
    Quad 2-input NAND gate
    PHILIPS [N...
  • 英文版
    Quad 2-input NAND gate
    PHILIPS
  • 英文版
    Quad 2-input NAND gate
    PHILIPS [N...

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