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74LVTH162245GX Datasheet

  • 74LVTH162245GX

  • Dual 8-bit Bus Transceiver

  • 9頁

  • ETC

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74LVT162245 鈥?74LVTH162245 Low Voltage 16-Bit Transceiver with 3-STATE Outputs and 25鈩?Series Resistors in
A Port Outputs
January 1999
Revised August 2001
74LVT162245 鈥?74LVTH162245
Low Voltage 16-Bit Transceiver with 3-STATE Outputs
and 25
鈩?/div>
Series Resistors in A Port Outputs
General Description
The LVT162245 and LVTH162245 contains sixteen non-
inverting bidirectional buffers with 3-STATE outputs and is
intended for bus oriented applications. The device is byte
controlled. Each byte has separate control inputs which
can be shorted together for full 16-bit operation. The T/R
inputs determine the direction of data flow through the
device. The OE inputs disable both the A and B ports by
placing them in a high impedance state.
The LVT162245 and LVTH162245 are designed with
equivalent 25
鈩?/div>
series resistance in both the HIGH and
LOW states on the A Port outputs. This design reduces line
noise in applications such as memory address drivers,
clock drivers, and bus transceivers/transmitters.
The LVTH162245 data inputs include bushold, eliminating
the need for external pull-up resistors to hold unused
inputs.
These non-inverting transceivers are designed for low
voltage (3.3V) V
CC
applications, but with the capability to
provide a TTL interface to a 5V environment. The
LVT162245 and LVTH162245 are fabricated with an
advanced BiCMOS technology to achieve high speed oper-
ation similar to 5V ABT while maintaining a low power dis-
sipation.
Features
s
Input and output interface capability to systems at
5V V
CC
s
Bushold data inputs eliminate the need for external
pull-up resistors to hold unused inputs (74LVTH162245),
also available without bushold feature (74LVT162245).
s
Live insertion/extraction permitted
s
Power Up/Down high impedance provides glitch-free
bus loading
s
A Port outputs include equivalent series resistance of
25
鈩?/div>
making external termination resistors unnecessary
and reducing overshoot and undershoot
s
A Port outputs source/sink
鹵
12 mA.
B Port outputs source/sink
鈭?/div>
32 mA/
+
64 mA
s
Functionally compatible with the 74 series 162245
s
Latch-up performance exceeds 500 mA
s
ESD performance:
Human-body model
>
2000V
Machine model
>
200V
Charged-device model
>
1000V
s
Also packaged in plastic Fine Pitch Ball Grid Array
(FBGA)
Ordering Code:
Order Number
74LVT162245GX
(Note 1)
74LVT162245MEA
74LVT162245MEAX
74LVT162245MTD
74LVT162245MTDX
74LVTH162245GX
(Note 1)
74LVTH162245MEA
74LVTH162245MEX
74LVTH162245MTD
74LVTH162245MTX
Package Number
BGA54A
(Preliminary)
MS48A
MS48A
MTD48
MTD48
BGA54A
MS48A
MS48A
MTD48
MTD48
Package Description
54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide
[TAPE and REEL]
48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide
[TUBE]
48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide
[TAPE and REEL]
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
[TUBE]
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
[TAPE and REEL]
54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide
[TAPE and REEL]
48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide
[TUBE]
48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide
[TAPE and REEL]
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
[TUBE]
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
[TAPE and REEL]
Note 1:
BGA package available in Tape and Reel only.
漏 2001 Fairchild Semiconductor Corporation
DS012446
www.fairchildsemi.com

74LVTH162245GX 產品屬性

  • 2,500

  • 集成電路 (IC)

  • 邏輯 - 緩沖器，驅動器，接收器，收發(fā)器

  • 74LVTH

  • 收發(fā)器，非反相

  • 2

  • 8

  • 12mA，12mA; 32mA，64mA

  • 2.7 V ~ 3.6 V

  • -40°C ~ 85°C

  • 表面貼裝

  • 54-LFBGA

  • 54-BGA

  • 帶卷 (TR)

74LVTH162245GX相關型號PDF文件下載

  • 型號
    版本
    描述
    廠商
    下載
  • 英文版
    Quad 2-input NAND gate
    PHILIPS
  • 英文版
    Quad 2-input NAND gate
    PHILIPS [P...
  • 英文版
    Quad 2-input NOR gate
    Philips
  • 英文版
    Quad 2-input NAND gate
    Philips
  • 英文版
    Hex inverter
    Philips
  • 英文版
    Quad 2-input AND gate
    Philips
  • 英文版
    Triple 3-input NAND gate
    Philips
  • 英文版
    Triple 3-input AND gate
    Philips
  • 英文版
    Hex inverting Schmitt-trigger
    Philips
  • 英文版
    Dual 4-input NAND gate
    Philips
  • 英文版
    Triple 3-input NOR gate
    Philips
  • 英文版
    Quad 2-input OR gate
    Philips
  • 英文版
    Dual D-type flip-flop with set and reset; positive-edge trig...
    PHILIPS
  • 英文版
    Dual D-type flip-flop with set and reset; positive-edge trig...
    PHILIPS [NXP Se...
  • 英文版
    Quad 2-input EXCLUSIVE-OR gate
    Philips
  • 英文版
    QUADRUPLE 2 INPUT POSITIVE NAND GATES
    TI [Texas ...
  • 英文版
    Quad 2-input NAND gate
    PHILIPS
  • 英文版
    Quad 2-input NAND gate
    PHILIPS [N...
  • 英文版
    Quad 2-input NAND gate
    PHILIPS
  • 英文版
    Quad 2-input NAND gate
    PHILIPS [N...

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