74LVQ374 Low Voltage Octal D-Type Flip-Flop with 3-STATE Outputs
February 1992
Revised June 2001
74LVQ374
Low Voltage Octal D-Type Flip-Flop
with 3-STATE Outputs
General Description
The LVQ374 is a high-speed, low-power octal D-type flip-
flop featuring separate D-type inputs for each flip-flop and
3-STATE outputs for bus-oriented applications. A buffered
Clock (CP) and Output Enable (OE) are common to all flip-
flops.
Features
s
Ideal for low power/low noise 3.3V applications
s
Implements patented EMI reduction circuitry
s
Available in SOIC JEDEC, SOIC EIAJ and QSOP pack-
ages
s
Guaranteed simultaneous switching noise level and
dynamic threshold performance
s
Improved latch-up immunity
s
Guaranteed incident wave switching into 75
鈩?/div>
s
4 kV minimum ESD immunity
s
Buffered positive edge-triggered clock
s
3-STATE outputs drive bus lines or buffer memory
address registers
Ordering Code:
Order Number
74LVQ374SC
74LVQ374SJ
74LVQ374QSC
Package Number
M20B
M20D
MQA20
Package Description
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150" Wide
Devices also available in Tape and Reel. Specify by appending suffix letter 鈥淴鈥?to the ordering code.
Logic Symbols
Connection Diagram
IEEE/IEC
Truth Table
Pin Descriptions
Pin Names
D
0
鈥揇
7
CP
OE
O
0
鈥揙
7
Data Inputs
Clock Pulse Input
3-STATE Output Enable Input
3-STATE Outputs
Description
Inputs
D
n
H
L
X
CP
Outputs
OE
L
L
H
L
=
LOW Voltage Level
Z
=
High Impedance
X
O
n
H
L
Z
H
=
HIGH Voltage Level
X
=
Immaterial
=
LOW-to-HIGH Transition
漏 2001 Fairchild Semiconductor Corporation
DS011360
www.fairchildsemi.com
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