音影先锋亚洲天堂网|电影世界尽头的爱完整版播放|国产 熟女 91|高清无码免费观看欧美日韩|韩国一区二区三区黄色录像|美女亚洲加勒比在线|亚洲综合网 开心五月|7x成人在线入口|成人网站免费日韩毛片区|国产黄片?一级?二级?三级

74LVCZ16245ADGVRE4 Datasheet

  • 74LVCZ16245ADGVRE4

  • 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS

  • 11頁

  • TI

掃碼查看芯片數(shù)據(jù)手冊

上傳產(chǎn)品規(guī)格書

PDF預(yù)覽

SN74LVCZ16245A
16-BIT BUS TRANSCEIVER
WITH 3-STATE OUTPUTS
SCES278D 鈥?JUNE 1999 鈥?REVISED AUGUST 2002
D
D
D
D
D
D
D
D
Member of the Texas Instruments
Widebus
錚?/div>
Family
Operates From 2.7 V to 3.6 V
Inputs Accept Voltages to 5.5 V
Max t
pd
of 3.7 ns at 3.3 V
I
off
and Power-Up 3-State Support Hot
Insertion
Supports Mixed-Mode Signal Operation on
All Ports (5-V Input/Output Voltage With
3.3-V V
CC
)
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
ESD Protection Exceeds JESD 22
鈥?2000-V Human-Body Model (A114-A)
鈥?1000-V Charged-Device Model (C101)
DGG, DGV, OR DL PACKAGE
(TOP VIEW)
description/ordering information
This 16-bit (dual-octal) noninverting bus
transceiver is designed for 2.7-V to 3.6-V V
CC
operation.
The SN74LVCZ16245A is designed for
asynchronous communication between data
buses. The control-function implementation
minimizes external timing requirements.
1DIR
1B1
1B2
GND
1B3
1B4
V
CC
1B5
1B6
GND
1B7
1B8
2B1
2B2
GND
2B3
2B4
V
CC
2B5
2B6
GND
2B7
2B8
2DIR
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
1OE
1A1
1A2
GND
1A3
1A4
V
CC
1A5
1A6
GND
1A7
1A8
2A1
2A2
GND
2A3
2A4
V
CC
2A5
2A6
GND
2A7
2A8
2OE
This device can be used as two 8-bit transceivers
or one 16-bit transceiver. It allows data
transmission from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the
direction-control (DIR) input. The output-enable (OE) input can be used to disable the device so that the buses
are effectively isolated.
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators
in a mixed 3.3-V/5-V system environment.
When V
CC
is between 0 and 1.5 V, the device is in the high-impedance state during power up or power down.
However, to ensure the high-impedance state above 1.5 V, OE should be tied to V
CC
through a pullup resistor;
the minimum value of the resistor is determined by the current-sinking capability of the driver.
ORDERING INFORMATION
TA
PACKAGE鈥?/div>
SSOP 鈥?DL
鈥?0擄C to 85擄C
40擄C
TSSOP 鈥?DGG
TVSOP 鈥?DGV
Tube
Tape and reel
Tape and reel
Tape and reel
ORDERABLE
PART NUMBER
SN74LVCZ16245ADL
SN74LVCZ16245ADLR
SN74LVCZ16245ADGGR
SN74LVCZ16245ADGVR
TOP-SIDE
MARKING
LVCZ16245A
LVCZ16245A
CW245A
鈥?Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines
are available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Widebus is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright
錚?/div>
2002, Texas Instruments Incorporated
POST OFFICE BOX 655303
鈥?/div>
DALLAS, TEXAS 75265
1

74LVCZ16245ADGVRE4 產(chǎn)品屬性

  • 2,000

  • 集成電路 (IC)

  • 邏輯 - 緩沖器，驅(qū)動器，接收器，收發(fā)器

  • 74LVCZ

  • 收發(fā)器，非反相

  • 2

  • 8

  • 24mA，24mA

  • 2.7 V ~ 3.6 V

  • -40°C ~ 85°C

  • 表面貼裝

  • 48-TFSOP（0.173"，4.40mm 寬）

  • 48-TVSOP

  • 帶卷 (TR)

74LVCZ16245ADGVRE4相關(guān)型號PDF文件下載

  • 型號
    版本
    描述
    廠商
    下載
  • 英文版
    Quad 2-input NAND gate
    PHILIPS
  • 英文版
    Quad 2-input NAND gate
    PHILIPS [P...
  • 英文版
    Quad 2-input NOR gate
    Philips
  • 英文版
    Quad 2-input NAND gate
    Philips
  • 英文版
    Hex inverter
    Philips
  • 英文版
    Quad 2-input AND gate
    Philips
  • 英文版
    Triple 3-input NAND gate
    Philips
  • 英文版
    Triple 3-input AND gate
    Philips
  • 英文版
    Hex inverting Schmitt-trigger
    Philips
  • 英文版
    Dual 4-input NAND gate
    Philips
  • 英文版
    Triple 3-input NOR gate
    Philips
  • 英文版
    Quad 2-input OR gate
    Philips
  • 英文版
    Dual D-type flip-flop with set and reset; positive-edge trig...
    PHILIPS
  • 英文版
    Dual D-type flip-flop with set and reset; positive-edge trig...
    PHILIPS [NXP Se...
  • 英文版
    Quad 2-input EXCLUSIVE-OR gate
    Philips
  • 英文版
    QUADRUPLE 2 INPUT POSITIVE NAND GATES
    TI [Texas ...
  • 英文版
    Quad 2-input NAND gate
    PHILIPS
  • 英文版
    Quad 2-input NAND gate
    PHILIPS [N...
  • 英文版
    Quad 2-input NAND gate
    PHILIPS
  • 英文版
    Quad 2-input NAND gate
    PHILIPS [N...

掃碼下載APP，
一鍵連接廣大的電子世界。

在線人工客服

買家服務(wù)：
賣家服務(wù)：
技術(shù)客服：

0571-85317607

網(wǎng)站技術(shù)支持

13606545031

客服在線時間周一至周五
9:00-17:30

關(guān)注官方微信號，
第一時間獲取資訊。

建議反饋

聯(lián)系人：

聯(lián)系方式：

按住滑塊，拖拽到最右邊
>>
感謝您向阿庫提出的寶貴意見，您的參與是維庫提升服務(wù)的動力！意見一經(jīng)采納，將有感恩紅包奉上哦！