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t
PHL
OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 1.65V to 3.6V (1.2V Data
Retention)
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 244
LATCH-UP PERFORMANCE EXCEEDS
500mA (JESD 17)
ESD PERFORMANCE:
HBM > 2000V (MIL STD 883 method 3015);
MM > 200V
SOP
TSSOP
ORDER CODES
PACKAGE
SOP
TSSOP
TUBE
74LVC244AM
T&R
74LVC244AMTR
74LVC244ATTR
DESCRIPTION
The 74LVC244A is a low voltage CMOS OCTAL
BUS BUFFER (3-STATE) fabricated with
sub-micron silicon gate and double-layer metal
wiring C
2
MOS technology. It is ideal for 1.65 to 3.6
V
CC
operations and low power and low noise
applications.
It can be interfaced to 5V signal environment for
inputs in mixed 3.3/5V system.
G control output governs four BUS BUFFERs.
This device is designed to be used with 3 state
memory address drivers, etc.
It has more speed performance at 3.3V than 5V
AC/ACT family, combined with a lower power
consumption.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
PIN CONNECTION AND IEC LOGIC SYMBOLS
February 2002
.
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