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74LCXH162244MTD Datasheet

  • 74LCXH162244MTD

  • Low Voltage 16-Bit Buffer/Line Driver with Bushold and 26з ...

  • 8頁(yè)

  • FAIRCHILD

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74LCXH162244 Low Voltage 16-Bit Buffer/Line Driver with Bushold and 26鈩?Series Resistors in Outputs
September 2000
Revised September 2000
74LCXH162244
Low Voltage 16-Bit Buffer/Line Driver with Bushold
and 26
鈩?/div>
Series Resistors in Outputs
General Description
The LCXH162244 contains sixteen non-inverting buffers
with 3-STATE outputs designed to be employed as a mem-
ory and address driver, clock driver, or bus oriented trans-
mitter/receiver. The device is nibble controlled. Each nibble
has separate 3-STATE control inputs which can be shorted
together for full 16-bit operation.
The LCXH162244 data inputs include active bushold cir-
cuitry, eliminating the need for external pull-up resistors to
hold unused or floating data inputs at a valid logic level.
In addition, the outputs include equivalent 26
鈩?/div>
(nominal)
series resistors to reduce overshoot and undershoot and
are designed to sink/source up to 12 mA at V
CC
=
3.0V.
The LCXH162244 is designed for low voltage (2.5V or
3.3V) V
CC
applications with capability of interfacing to a 5V
signal environment.
The LCXH162244 is fabricated with an advanced CMOS
technology to achieve high speed operation while maintain-
ing CMOS low power dissipation.
Features
s
5V tolerant control inputs and outputs
s
2.3V鈥?.6V V
CC
specifications provided
s
Outputs include equivalent series resistance of 26
鈩?/div>
to
make external termination resistors unnecessary and
reduce overshoot and undershoot
s
Bushold on data inputs eliminates the need for external
pull-up/pull-down resistors
s
5.3 ns t
PD
max (V
CC
=
3.0V), 20
碌
A I
CC
max
s
Power down high impedance inputs and outputs
s
鹵
12 mA output drive (V
CC
=
3.0V)
s
Implements patented noise/EMI reduction circuitry
s
Latch-up performance exceeds 500 mA
s
ESD performance:
Human body model
>
2000V
Machine model
>
200V
Ordering Code:
Order Number
74LCXH162244MEA
74LCXH162244MTD
Package Number
MS48A
MTD48
Package Description
48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300 Wide
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter 鈥淴鈥?to the ordering code.
Connection Diagram
Logic Symbol
Pin Descriptions
Pin Names
OE
n
I
0
鈥揑
15
O
0
鈥揙
15
Description
Output Enable Input (Active LOW)
Bushold Inputs
Outputs
漏 2000 Fairchild Semiconductor Corporation
DS500249
www.fairchildsemi.com

74LCXH162244MTD 產(chǎn)品屬性

  • 38

  • 集成電路 (IC)

  • 邏輯 - 緩沖器，驅(qū)動(dòng)器，接收器，收發(fā)器

  • 74LCXH

  • 緩沖器/線路驅(qū)動(dòng)器，非反相

  • 4

  • 4

  • 12mA，12mA

  • 2 V ~ 3.6 V

  • -40°C ~ 85°C

  • 表面貼裝

  • 48-TFSOP（0.240"，6.10mm 寬）

  • 48-TSSOP

  • 管件

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