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74LCX38MX Datasheet

  • 74LCX38MX

  • LOGIC GATE|QUAD 2-INPUT NAND|LCX-CMOS|SOP|14PIN|PLASTIC

  • 106.61KB

  • 7頁(yè)

  • ETC

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74LCX38 Low Voltage Quad 2-Input NAND Gate (Open Drain) with 5V Tolerant Inputs
October 1995
Revised February 2002
74LCX38
Low Voltage Quad 2-Input NAND Gate (Open Drain)
with 5V Tolerant Inputs
General Description
The LCX38 contains four 2-input open drain NAND gates.
The inputs tolerate voltages up to 7V allowing the interface
of 5V systems to 3V systems.
The 74LCX38 is fabricated with advanced CMOS technol-
ogy to achieve high speed operation while maintaining
CMOS low power dissipation.
Features
s
5V tolerant inputs
s
2.3V to 3.6V V
CC
specifications provided
s
5.0 ns t
PD
max (V
CC
=
3.3V), 10
碌
A I
CC
max
s
Power down high impedance inputs and outputs
s
24 mA output drive (V
CC
=
3.0V)
s
Implements patented noise/EMI reduction circuitry
s
Latch-up performance exceeds 500 mA
s
ESD performance:
Human body model
>
2000V
Machine model
>
150V
Ordering Code:
Order Number
74LCX38M
74LCX38SJ
74LCX38MTC
Package Number
M14A
M14D
MTC14
Package Description
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter 鈥淴鈥?to the ordering code.
Logic Symbol
IEEE/IEC
Connection Diagram
Pin Descriptions
Pin Names
A
n
, B
n
O
n
Description
Inputs
Outputs
漏 2002 Fairchild Semiconductor Corporation
DS012574
www.fairchildsemi.com

74LCX38MX 產(chǎn)品屬性

  • 2,500

  • 集成電路 (IC)

  • 邏輯 - 柵極和逆變器

  • 74LCX

  • 與非門

  • 4

  • 2

  • 開(kāi)路漏極

  • 2 V ~ 3.6 V

  • 10µA

  • -，24mA

  • 0.7 V ~ 0.8 V

  • 1.7 V ~ 2 V

  • 5ns @ 3.3V，50pF

  • -40°C ~ 85°C

  • 表面貼裝

  • 14-SOIC

  • 14-SOIC（0.154"，3.90mm 寬）

  • 帶卷 (TR)

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