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74LCX16652MEAX Datasheet

  • 74LCX16652MEAX

  • Dual 8-bit Bus Transceiver

  • 10頁(yè)

  • ETC

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74LCX16652 Low Voltage Transceiver/Register with 5V Tolerant Inputs and Outputs
February 1994
Revised April 2001
74LCX16652
Low Voltage Transceiver/Register
with 5V Tolerant Inputs and Outputs
General Description
The LCX16652 contains sixteen non-inverting bidirectional
bus transceivers with 3-STATE outputs providing multi-
plexed transmission of data directly from the input bus or
from the internal registers. Data on the A or B bus will be
clocked into the registers as the appropriate clock pin goes
to the HIGH logic level. Output Enable pins (OEAB, OEBA)
are provided to control the transceiver function (see Func-
tional Description).
The LCX16652 is designed for low-voltage (2.5V or 3.3V)
V
CC
applications with capability of interfacing to a 5V signal
environment.
The LCX16652 is fabricated with an advanced CMOS tech-
nology to achieve high speed operation while maintaining
CMOS low power dissipation.
Features
s
5V tolerant inputs and outputs
s
2.3V鈥?.6V V
CC
specifications provided
s
5.7 ns t
PD
max (V
CC
=
3.3V), 20
碌
A I
CC
max
s
Power down high impedance inputs and outputs
s
Supports live insertion/withdrawal (Note 1)
s
鹵
24 mA output drive (V
CC
=
3.0V)
s
Implements patented noise/EMI reduction circuitry
s
Latch-up performance exceeds 500 mA
s
ESD performance:
Human body model
>
2000V
Machine model
>
200V
Note 1:
To ensure the high-impedance state during power up or down, OE
should be tied to V
CC
and OE tied to GND through a resistor: the minimum
value or the resistor is determined by the current-sourcing capability of the
driver.
Ordering Code:
Order Number
74LCX16652MEA
74LCX16652MTD
Package Number
MS56A
MTD56
Package Description
56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300 Wide
56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter 鈥淴鈥?to the ordering code.
Logic Symbol
Pin Descriptions
Pin Names
A
0
鈥揂
15
B
0
鈥揃
15
CPAB
n
, CPBA
n
SAB
n
, SBA
n
Description
Data Register A Inputs/3-STATE Outputs
Data Register B Inputs/3-STATE Outputs
Clock Pulse Inputs
Select Inputs
OEAB
n
, OEBA
n
Output Enable Inputs
漏 2001 Fairchild Semiconductor Corporation
DS012005
www.fairchildsemi.com

74LCX16652MEAX 產(chǎn)品屬性

  • 1,000

  • 集成電路 (IC)

  • 邏輯 - 緩沖器，驅(qū)動(dòng)器，接收器，收發(fā)器

  • 74LCX

  • 寄存收發(fā)器，非反相

  • 1

  • 16

  • 24mA，24mA

  • 2 V ~ 3.6 V

  • -40°C ~ 85°C

  • 表面貼裝

  • 56-BSSOP（0.295"，7.50mm 寬）

  • 56-SSOP

  • 帶卷 (TR)

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