74LCX16543 Low Voltage 16-Bit Registered Transceiver with 5V Tolerant Inputs and Outputs
May 1995
Revised April 2001
74LCX16543
Low Voltage 16-Bit Registered Transceiver
with 5V Tolerant Inputs and Outputs
General Description
The LCX16543 contains sixteen non-inverting transceivers
containing two sets of D-type registers for temporary stor-
age of data flowing in either direction. Each byte has sepa-
rate control inputs which can be shorted together for full
16-bit operation. Separate Latch Enable and Output
Enable inputs are provided for each register to permit inde-
pendent input and output control in either direction of data
flow.
The LCX16543 is designed for low voltage (2.5V or 3.3V)
V
CC
applications with capability of interfacing to a 5V signal
environment.
The LCX16543 is fabricated with an advanced CMOS tech-
nology to achieve high speed operation while maintaining
CMOS low power dissipation.
Features
s
5V tolerant inputs and outputs
s
2.3V鈥?.6V V
CC
specifications provided
s
5.2 ns t
PD
max (V
CC
=
3.3V), 20
碌
A I
CC
max
s
Power down high impedance inputs and outputs
s
Supports live insertion/withdrawal (Note 1)
s
鹵
24 mA Output Drive (V
CC
=
3.0V)
s
Implements patented noise/EMI reduction circuitry
s
Latch-up performance exceeds 500 mA
s
ESD performance:
Human Body Model
>
2000V
Machine Model
>
200V
Note 1:
To ensure the high-impedance state during power up or down, OE
should be tied to V
CC
through a pull-up resistor: the minimum value or the
resistor is determined by the current-sourcing capability of the driver.
Ordering Code:
Order Number
74LCX16543MEA
74LCX16543MTD
Package Number
MS56A
MTD56
Package Description
56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300 Wide
56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter 鈥淴鈥?to the ordering code.
Connection Diagram
Logic Symbol
漏 2001 Fairchild Semiconductor Corporation
DS012464
www.fairchildsemi.com