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74LCX112SJ Datasheet

  • 74LCX112SJ

  • Low Voltage Dual J-K Negative Edge-Triggered Flip-Flop with ...

  • 101.72KB

  • 9頁

  • FAIRCHILD

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74LCX112 Low Voltage Dual J-K Negative Edge-Triggered Flip-Flop with 5V Tolerant Inputs
June 1998
Revised February 2001
74LCX112
Low Voltage Dual J-K Negative Edge-Triggered Flip-Flop
with 5V Tolerant Inputs
General Description
The LCX112 is a dual J-K flip-flop. Each flip-flop has inde-
pendent J, K, PRESET, CLEAR, and CLOCK inputs with Q,
Q outputs. These devices are edge sensitive and change
state on the negative going transition of the clock pulse.
Clear and preset are independent of the clock and accom-
plished by a low logic level on the corresponding input.
LCX devices are designed for low voltage (3.3V or 2.5)
operation with the added capability of interfacing to a 5V
signal environment.
The 74LCX112 is fabricated with advanced CMOS technol-
ogy to achieve high speed operation while maintaining
CMOS low power dissipation.
Features
s
5V tolerant inputs
s
2.3V鈥?.6V V
CC
specifications provided
s
7.5 ns t
PD
max (V
CC
=
3.3V), 10
碌
A I
CC
max
s
Power down high impedance inputs and outputs
s
鹵
24 mA output drive (V
CC
=
3.0V)
s
Implements patented noise/EMI reduction circuitry
s
Latch-up performance exceeds 500 mA
s
ESD performance:
Human body model
>
2000V
Machine model
>
2000V
Ordering Code:
Order Number
74LCX112M
74LCX112SJ
74LCX112MTC
Package Number
M16A
M16D
MTC16
Package Description
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Devices also available in Tape and Reel. Specify by appending suffix letter 鈥淴鈥?to the ordering code.
Logic Symbol
IEEE/IEC
Connection Diagram
Pin Descriptions
Pin Names
J
1
, J
2
, K
1
, K
2
CP
1
, CP
2
C
D1
, C
D2
S
D1
, S
D2
Q
1
, Q
2
, Q
1
, Q
2
Description
Data Inputs
Clock Pulse Inputs (Active Falling Edge)
Direct Clear Inputs (Active LOW)
Direct Set Inputs (Active LOW)
Outputs
漏 2001 Fairchild Semiconductor Corporation
DS012424
www.fairchildsemi.com

74LCX112SJ 產(chǎn)品屬性

  • 47

  • 集成電路 (IC)

  • 邏輯 - 觸發(fā)器

  • 74LCX

  • 設(shè)置（預(yù)設(shè)）和復(fù)位

  • JK 型

  • 差分

  • 2

  • 1

  • 150MHz

  • 7ns

  • 負(fù)邊沿

  • 24mA，24mA

  • 2 V ~ 3.6 V

  • -40°C ~ 85°C

  • 表面貼裝

  • 16-SOIC（0.209"，5.30mm 寬）

  • 管件

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