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74LCX07SJX Datasheet

  • 74LCX07SJX

  • Hex Buffer

  • 7頁

  • ETC

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74LCX07 Low Voltage Hex Buffer with Open Drain Outputs
October 1999
Revised July 2001
74LCX07
Low Voltage Hex Buffer with Open Drain Outputs
General Description
The LCX07 contains six buffers. The inputs tolerate volt-
ages up to 7V allowing the interface of 5V systems to 3V
systems.
The outputs of the LCX07 are open drain and can be con-
nected to other open drain outputs to implement active
HIGH wire AND or active LOW wire OR functions.
The 74LCX07 is fabricated with advanced CMOS technol-
ogy to achieve high speed operation while maintaining
CMOS low power dissipation.
Features
s
5V tolerant inputs
s
2.3V鈥?.5V V
CC
specifications provided
s
2.9 ns t
PD
max (V
CC
=
3.3V), 10
碌
A I
CC
max
s
Power down high impedance inputs and outputs
s
+
24 mA output drive (V
CC
=
3.0V)
s
Implements patented noise/EMI reduction circuitry
s
Latch-up performance exceeds 500 mA
s
ESD performance:
Human body model
>
2000V
Machine model
>
200V
Ordering Code:
Order Number
74LCX07M
74LCX07SJ
74LCX07MTC
Package Number
M14A
M14D
MTC14
Package Description
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter 鈥淴鈥?to the ordering code.
Logic Symbol
IEEE/IEC
Connection Diagram
Pin Descriptions
Pin Names
A
n
O
n
Description
Inputs
Outputs
漏 2001 Fairchild Semiconductor Corporation
DS500238
www.fairchildsemi.com

74LCX07SJX 產(chǎn)品屬性

  • 2,000

  • 集成電路 (IC)

  • 邏輯 - 緩沖器，驅(qū)動器，接收器，收發(fā)器

  • 74LCX

  • 緩沖器/線路驅(qū)動器，非反相并帶開漏極

  • 6

  • 1

  • 32mA，32mA

  • 2 V ~ 5.5 V

  • -40°C ~ 85°C

  • 表面貼裝

  • 14-SOIC（0.209"，5.30mm 寬）

  • 14-SOIC

  • 帶卷 (TR)

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