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74HC283N Datasheet

  • 74HC283N

  • 4-bit binary full adder with fast carry

  • 109.14KB

  • 20頁

  • PHILIPS

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74HC283
4-bit binary full adder with fast carry
Rev. 03 鈥?11 November 2004
Product data sheet
1. General description
The 74HC283 is a high-speed Si-gate CMOS device and is pin compatible with low power
Schottky TTL (LSTTL). The 74HC283 is speci鏗乪d in compliance with JEDEC
standard no. 7A.
The 74HC283 adds two 4-bit binary words (An plus Bn) plus the incoming carry (CIN).
The binary sum appears on the sum outputs (S1 to S4) and the out-going carry (COUT)
according to the equation:
CIN + (A1 + B1) + 2(A2 + B2) + 4(A3 + B3) + 8(A4 + B4) =
= S1 + 2S2 + 4S3 + 8S4 + 16COUT
Where (+) = plus.
Due to the symmetry of the binary add function, the 74HC283 can be used with either all
active HIGH operands (positive logic) or all active LOW operands (negative logic). In case
of all active LOW operands the results S1 to S4 and COUT should be interpreted also as
active LOW. With active HIGH inputs, CIN must be held LOW when no carry in is
intended. Interchanging inputs of equal weight does not affect the operation, thus CIN, A1,
B1 can be assigned arbitrarily to pins 5, 6, 7, etc.
See the 74HC583 for the BCD version.
2. Features
s
s
s
s
s
s
High-speed 4-bit binary addition
Cascadable in 4-bit increments
Fast internal look-ahead carry
Low-power dissipation
Complies with JEDEC standard no. 7A
ESD protection:
x
HBM EIA/JESD22-A114-B exceeds 2000 V
x
MM EIA/JESD22-A115-A exceeds 200 V.
s
Multiple package options
s
Speci鏗乪d from
鈭?0 擄C
to +80
擄C
and from
鈭?0 擄C
to +125
擄C.

74HC283N 產(chǎn)品屬性

  • NXP

  • 邏輯加法器與減法器

  • HC

  • PDIP-16

  • - 5.2 mA

  • 5.2 mA

  • 210 ns, 42 ns, 36 ns

  • 5 V

  • + 125 C

  • - 40 C

  • Tube

  • Binary Full Adder

  • CMOS

  • Through Hole

  • 4

  • 1

  • 25

  • 6 V

  • 2 V

  • 74HC283N,652

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