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74FR240SJ Datasheet

  • 74FR240SJ

  • Octal Buffer/Line Driver with 3-STATE Outputs

  • 5頁

  • FAIRCHILD

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74FR240 Octal Buffer/Line Driver with 3-STATE Outputs
October 1991
Revised August 1999
74FR240
Octal Buffer/Line Driver with 3-STATE Outputs
General Description
The 74FR240 is an inverting octal buffer and line driver
designed to be employed as memory and address driver,
clock driver and bus oriented transmitter or receiver.
Features
s
3-STATE outputs drive bus lines or buffer memory
address registers
s
Outputs sink 64 mA and source 15 mA
s
Guaranteed pin-to-pin skew
Ordering Code:
Order Number
74FR240SC
74FR240SJ
74FR240PC
Package Number
M20B
M20D
N20A
Package Description
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter 鈥淴鈥?to the ordering code.
Connection Diagram
Pin Descriptions
Pin Names
OE
1
, OE
2
I
0
鈥揑
7
O
0
鈥揙
7
Description
Output Enable Input (Active-LOW)
Inputs
Outputs
Truth Tables
Inputs
OE
1
L
L
H
Inputs
OE
2
L
L
H
H
=
HIGH Voltage Level
L
=
LOW Voltage Level
X
=
Immaterial
Z
=
High Impedance
Outputs
I
n
L
H
X
(Pins 12, 14, 16, 18)
H
L
Z
Outputs
I
n
L
H
X
(Pins 3, 5, 7, 9)
H
L
Z
漏 1999 Fairchild Semiconductor Corporation
DS010901
www.fairchildsemi.com

74FR240SJ 產(chǎn)品屬性

  • Fairchild Semiconductor

  • 8

  • 8

  • Inverting

  • 5.5 V

  • 4.5 V

  • + 70 C

  • SMD/SMT

  • SOP-20

  • Rail

  • - 15 mA

  • FR

  • Bipolar

  • 64 mA

  • 0 C

  • 8

  • 3-State

  • 4.7 ns at 5 V

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