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74F794PC Datasheet

  • 74F794PC

  • 8-Bit Register with Readback

  • 6頁(yè)

  • FAIRCHILD

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74F794 8-Bit Register with Readback
March 1990
Revised August 1999
74F794
8-Bit Register with Readback
General Description
The 74F794 is an 8-bit register with readback capability
designed to store data as well as read the register informa-
tion back onto the data bus. The I/O bus (D bus) has 3-
STATE outputs. Current sinking capability is 64 mA on both
the D and Q busses.
Data is loaded into the registers on the LOW-to-HIGH tran-
sition of the clock (CP). The output enable (OE) is used to
enable data on D
0
鈥揇
7
. When OE is LOW, the output of the
registers is enabled on D
0
鈥揇
7
, enabling D as an output
bus. When OE is HIGH, D
0
鈥揇
7
are inputs to the registers
configuring D as an input bus.
Features
s
3-STATE outputs on the I/O port
s
D and Q output sink capability of 64 mA
s
Functionally and pin equivalent to the 74LS794
Ordering Code:
Order Number
74F794SC
74F794PC
Package Number
M20B
N20A
Package Description
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter 鈥淴鈥?to the ordering code.
Logic Symbol
Connection Diagram
漏 1999 Fairchild Semiconductor Corporation
DS010652
www.fairchildsemi.com

74F794PC 產(chǎn)品屬性

  • 18

  • 集成電路 (IC)

  • 邏輯 - 觸發(fā)器

  • 74F

  • 標(biāo)準(zhǔn)

  • D 型總線

  • 三態(tài)非反相

  • 1

  • 8

  • 90MHz

  • 2.5ns

  • 正邊沿

  • 15mA，64mA

  • 4.5 V ~ 5.5 V

  • 0°C ~ 70°C

  • 通孔

  • 20-DIP（0.300"，7.62mm）

  • 管件

  • 74F794

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