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54F 74F410 Register Stack

August 1995

54F 74F410 Register Stack 16 x 4 RAM

TRI-STATE Output Register

General Description

The 鈥橣410 is a register-oriented high-speed 64-bit Read

Write Memory organized as 16-words by 4-bits An edge-

triggered 4-bit output register allows new input data to be

written while previous data is held TRI-STATE outputs are

provided for maximum versatility The 鈥橣410 is fully compati-

ble with all TTL families

Features

Y

Y

Y

Y

Y

Y

Edge-triggered output register

Typical access time of 35 ns

TRI-STATE outputs

Optimized for register stack operation

18-pin package

9410 replacement

16 x 4 RAM TRI-STATE Output Register

Commercial

74F410PC

Military

Package

Number

N18A

Package Description

18-Lead (0 300 Wide) Molded Dual-In-Line

18-Lead Ceramic Dual-In-Line

20-Lead (0 300 Wide) Molded Small Outline JEDEC

20-Lead Cerpak

54F410DM (Note 1)

74F410SC

54F410LM

J18A

M20B

W20A

Note 1

Military grade device with environmental and burn-in processing Use suffix

e

DMQB LMQB

Logic Symbol

Connection Diagrams

Pin Assignment

for DIP and SOIC

Pin Assignment

for LCC

TL F 9538鈥?

TL F 9538 鈥?1

TL F 9538 鈥?2

TRI-STATE is a registered trademark of National Semiconductor Corporation

C

1995 National Semiconductor Corporation

TL F 9538

RRD-B30M105 Printed in U S A

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