74F132 Quad 2-Input NAND Schmitt Trigger
April 1988
Revised July 1999
74F132
Quad 2-Input NAND Schmitt Trigger
General Description
The F132 contains four 2-input NAND gates which accept
standard TTL input signals and provide standard TTL out-
put levels. They are capable of transforming slowly chang-
ing input signals into sharply defined, jitter-free output
signals. In addition, they have a greater noise margin than
conventional NAND gates.
Each circuit contains a 2-input Schmitt Trigger followed by
level shifting circuitry and a standard FAST鈩?output struc-
ture. The Schmitt Trigger uses positive feedback to effec-
tively speed-up slow input transitions, and provide different
input threshold voltages for positive and negative-going
transitions. This hysteresis between the positive-going and
negative-going input threshold (typically 800 mV) is deter-
mined by resistor ratios and is essentially insensitive to
temperature and supply voltage variations.
Ordering Code:
Order Number
74F132SC
74F132SJ
74F132PC
Package Number
M14A
M14D
N14A
Package Description
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter 鈥淴鈥?to the ordering code.
Logic Symbol
IEEE/IEC
Connection Diagram
Unit Loading/Fan Out
U.L.
Pin Names Description
A
n
, B
n
O
n
Inputs
Outputs
Input I
IH
/I
IL
20
碌A(chǔ)/鈭?.6
mA
鈭?
mA/20 mA
HIGH/LOW Output I
OH
/I
OL
1.0/1.0
50/33.3
Function Table
Inputs
A
L
L
H
H
H
=
HIGH Voltage Level
L
=
LOW Voltage Level
Outputs
B
L
H
L
H
O
H
H
H
L
FAST廬 is a registered trademark of Fairchild Semiconductor Corporation
漏 1999 Fairchild Semiconductor Corporation
DS009477
www.fairchildsemi.com
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