74F00 Quad 2-Input NAND Gate
December 1994
Revised September 2000
74F00
Quad 2-Input NAND Gate
General Description
This device contains four independent gates, each of which
performs the logic NAND function.
Ordering Code:
Order Number
74F00SC
74F00SJ
74F00PC
Package Number
M14A
M14D
N14A
Package Description
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter 鈥淴鈥?to the ordering code.
Logic Symbol
IEEE/IEC
Connection Diagram
Unit Loading/Fan Out
U.L.
Pin Names
A
n
, B
n
O
n
Description
HIGH/LOW
Inputs
Outputs
1.0/1.0
50/33.3
Input I
IH
/I
IL
Output I
OH
/I
OL
20
碌
A/
鈭?/div>
0.6 mA
鈭?/div>
1 mA/20 mA
漏 2000 Fairchild Semiconductor Corporation
DS009454
www.fairchildsemi.com
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