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74ALVC38M Datasheet

  • 74ALVC38M

  • Low Voltage Quad 2-Input NAND Gate with Open Drain Outputs a...

  • 5頁(yè)

  • FAIRCHILD

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74ALVC38 Low Voltage Quad 2-Input NAND Gate with Open Drain Outputs and 3.6V Tolerant Inputs and Outputs
December 2001
Revised December 2001
74ALVC38
Low Voltage Quad 2-Input NAND Gate with
Open Drain Outputs and
3.6V Tolerant Inputs and Outputs
General Description
The ALVC38 contains four 2-input NAND gates with open
drain outputs. This product is designed for low voltage
(1.4V to 3.6V) V
CC
applications with I/O compatibility up to
3.6V.
The ALVC38 is fabricated with advanced CMOS technol-
ogy to achieve high-speed operation while maintaining
CMOS low power dissipation.
Features
s
1.4V to 3.6V V
CC
supply operation
s
3.6V tolerant inputs and outputs
s
t
PD
3.3 ns max for 3.0V to 3.6V V
CC
4.2 ns max for 2.3V to 2.7V V
CC
6.7 ns max for 1.65V to 1.95V V
CC
s
Power-off high impedance inputs and outputs
s
Uses patented Quiet Series
錚?/div>
noise/EMI reduction
circuitry
s
Latchup conforms to JEDEC JED78
s
ESD performance:
Human body model
>
2000V
Machine model
>
250V
Ordering Code:
Order Number
74ALVC38M
74ALVC38MTC
Package Number
M14A
MTC14
Package Description
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter 鈥淴鈥?to the ordering code.
Logic Symbol
IEEE/IEC
Connection Diagram
Pin Descriptions
Pin Names
A
n
, B
n
O
n
Description
Inputs
Outputs
Quiet Series錚?is a trademark of Fairchild Semiconductor Corporation.
漏 2001 Fairchild Semiconductor Corporation
ds500719
www.fairchildsemi.com

74ALVC38M 產(chǎn)品屬性

  • 55

  • 集成電路 (IC)

  • 邏輯 - 柵極和逆變器

  • 74ALVC

  • 與非門(mén)

  • 4

  • 2

  • 開(kāi)路漏極

  • 1.65 V ~ 3.6 V

  • 40µA

  • -，24mA

  • 0.7 V ~ 0.8 V

  • 1.7 V ~ 2 V

  • 3.3ns @ 3.3V，50pF

  • -40°C ~ 85°C

  • 表面貼裝

  • 14-SOIC

  • 14-SOIC（0.154"，3.90mm 寬）

  • 管件

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