74ALVC245 Low Voltage Bidirectional Transceiver with 3.6V Tolerant Inputs and Outputs
September 2001
Revised March 2005
74ALVC245
Low Voltage Bidirectional Transceiver
with 3.6V Tolerant Inputs and Outputs
General Description
The ALVC245 contains eight non-inverting bidirectional
buffers with 3-STATE outputs and is intended for bus ori-
ented applications. The T/R input determines the direction
of data flow. The OE input disables both the A and B ports
by placing them in a high impedance state.
The 74ALVC245 is designed for low voltage (1.65V to
3.6V) V
CC
applications with I/O compatibility up to 3.6V.
The 74ALVC245 is fabricated with an advanced CMOS
technology to achieve high-speed operation while main-
taining low CMOS power dissipation.
Features
s
1.65V to 3.6V V
CC
supply operation
s
3.6V tolerant inputs and outputs
s
Power-off high impedance inputs and outputs
s
Supports Live Insertion and Withdrawal (Note 1)
s
t
PD
3.4 ns max for 3.0V to 3.6V V
CC
3.9 ns max for 2.3V to 2.7V V
CC
6 ns max for 1.65V to 1.95V V
CC
s
Uses patented Quiet Series
樓
noise/EMI reduction
circuitry
s
Latchup conforms to JEDEC JED78
s
ESD performance:
Human body model
!
2000V
Machine model
!
200V
Note 1:
To ensure the high impedance state during power up and power
down, OE
n
should be tied to V
CC
through a pull up resistor. The minimum
value of the resistor is determined by the current sourcing capability of the
driver.
Ordering Code:
Order Number
74ALVC245WM
74ALVC245MTC
74ALVC245MTCX_NL
(Note 2)
Package
Number
M20B
MTC20
MTC20
Package Description
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Pb-Free 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter 鈥淴鈥?to the ordering code.
Note 2:
鈥淿NL鈥?indicates Pb-Free package (per JEDEC J-STD-020B). Device available in Tape and Reel only.
Logic Symbol
Pin Descriptions
Pin Names
OE
T/R
A
0
鈥揂
7
B
0
鈥揃
7
Description
Output Enable Input (Active LOW)
Transmit/Receive Input
Side A Inputs or 3-STATE Outputs
Side B Inputs or 3-STATE Outputs
Quiet Series
樓
is a trademark of Fairchild Semiconductor Corporation.
漏 2005 Fairchild Semiconductor Corporation
DS500647
www.fairchildsemi.com
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