74ALVC132 Low Voltage Quad 2-Input NAND Gate with Schmitt Trigger Inputs and 3.6V Tolerant Inputs and
Outputs
December 2001
Revised December 2001
74ALVC132
Low Voltage Quad 2-Input NAND Gate with
Schmitt Trigger Inputs and 3.6V Tolerant Inputs
and Outputs
General Description
The ALVC132 contains four 2-input NAND gates with
Schmitt Trigger Inputs. The pin configuration and function
are the same as the ALVC00 except the inputs have hys-
teresis between the positive-going and negative-going
input thresholds. This hysteresis is useful for transforming
slowly switching input signals into sharply defined, jitter-
free output signals. This product should be used where
noise margin greater than that of conventional gates is
required.
The ALVC132 is designed for low voltage (1.65V to 3.6V)
V
CC
applications with I/O compatibility up to 3.6V.
This product is fabricated with an advanced CMOS tech-
nology to achieve high-speed operation while maintaining
low CMOS power dissipation.
Features
s
1.65V to 3.6V V
CC
supply operation
s
3.6V tolerant inputs and outputs
s
t
PD
3.8 ns max for 3.0V to 3.6V V
CC
4.6 ns max for 2.3V to 2.7V V
CC
8.2 ns max for 1.65V to 1.95V V
CC
s
Power-off high impedance inputs and outputs
s
Uses patented Quiet Series
錚?/div>
noise/EMI reduction
circuitry
s
Latchup conforms to JEDEC JED78
s
ESD performance:
Human body model
>
2000V
Machine model
>
250V
Ordering Code:
Order Number
74ALVC132M
74ALVC132MTC
Package Number
M14A
MTC14
Package Description
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Devices also available in Tape and Reel. Specify by appending suffix letter 鈥淴鈥?to the ordering code.
Logic Diagram
Connection Diagram
Pin Descriptions
Pin Name
A
n
, B
n
O
n
Description
Inputs
Outputs
Quiet Series錚?is a trademark of Fairchild Semiconductor Corporation.
漏 2001 Fairchild Semiconductor Corporation
ds500720
www.fairchildsemi.com
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