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74AHC3GU04DC Datasheet

  • 74AHC3GU04DC

  • high-speed Si-gate CMOS device

  • 17頁(yè)

  • PHILIPS

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74AHC3GU04
Inverter
Rev. 01 鈥?5 March 2004
Product data sheet
1. General description
The 74AHC3GU04 is a high-speed Si-gate CMOS device. This device provides the
inverting single stage function.
2. Features
s
Symmetrical output impedance
s
High noise immunity
s
ESD protection:
x
HBM EIA/JESD22-A114-A exceeds 2000 V
x
MM EIA/JESD22-A115-A exceeds 200 V
x
CDM EIA/JESD22-C101 exceeds 1000 V.
s
Low power dissipation
s
Balanced propagation delays
s
SOT505-2 and SOT765-1 package
s
Output capability
鹵8
mA drive
s
Speci鏗乪d from
鈭?0 擄C
to +85
擄C
and from
鈭?0 擄C
to +125
擄C.
3. Quick reference data
Table 1:
Quick reference data
GND = 0 V; T
amb
= 25
擄
C; t
r
= t
f
鈮?/div>
3.0 ns.
Symbol
t
PHL
, t
PLH
C
I
C
PD
[1]
Parameter
Conditions
Min
-
-
[1]
[2]
Typ
2.5
3.0
4
Max
5.5
10
-
Unit
ns
pF
pF
propagation delay nA to nY V
CC
= 5 V;
C
L
= 15 pF
input capacitance
power dissipation
capacitance
-
C
PD
is used to determine the dynamic power dissipation (P
D
in
碌W).
P
D
= C
PD
脳
V
CC2
脳
f
i
脳
N +
危(C
L
脳
V
CC2
脳
f
o
) where:
f
i
= input frequency in MHz;
f
o
= output frequency in MHz;
C
L
= output load capacitance in pF;
V
CC
= supply voltage in Volts;
N = total load switching outputs;
危(C
L
脳
V
CC2
脳
f
o
) = sum of the outputs.
[2]
The condition is V
I
= GND to V
CC
.

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