74ACTQ841 Quiet Series鈩?10-Bit Transparent Latch with 3-STATE Outputs
March 1990
Revised November 1998
74ACTQ841
Quiet Series鈩?10-Bit Transparent Latch
with 3-STATE Outputs
General Description
The ACTQ841 bus interface latch is designed to eliminate
the extra packages required to buffer existing latches and
provide extra data width for wider address/data paths or
buses carrying parity. The 841 is a 10-bit transparent latch,
a 10-bit version of the 373. The ACTQ841 utilizes Fairchild
Quiet Series鈩?technology to guarantee quiet output switch-
ing and improved dynamic threshold performance. FACT
Quiet Series features GTO鈩?output control and undershoot
corrector in addition to a split ground bus for superior per-
formance.
Features
s
Guaranteed simultaneous switching noise level and
dynamic threshold performance
s
Guaranteed pin-to-pin skew AC performance
s
Inputs and outputs on opposite sides of package allow
easy interface with microprocessors
s
Improved latch-up immunity
s
Outputs source/sink 24 mA
s
Has TTL-compatible inputs
Ordering Code:
Order Number
74ACTQ841SC
74ACTQ841SPC
Package Number
M24B
N24C
Package Description
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300鈥?Wide Body
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC, MS-100, 0.300鈥?Wide
Device also available in Tape and Reel. Specify by appending suffix letter 鈥淴鈥?to the ordering code.
Logic Symbols
Connection Diagram
Pin Assignment
for DIP and SOIC
Pin Descriptions
Pin Names
D
0
鈥揇
9
O
0
鈥揙
9
OE
LE
Description
Data Inputs
3-STATE Outputs
Output Enable
Latch Enable
FACT鈩? Quiet Series鈩? FACT Quiet Series鈩?and GTO鈩?are trademarks of Fairchild Semiconductor Corporation.
漏 1999 Fairchild Semiconductor Corporation
DS010688.prf
www.fairchildsemi.com