74AC899
54ACT 74ACT899
9-Bit Latchable Transceiver with Parity Generator Checker
August 1994
74AC899
54ACT 74ACT899
9-Bit Latchable Transceiver
with Parity Generator Checker
General Description
The 鈥橝C 鈥橝CT899 is a 9-bit to 9-bit parity transceiver with
transparent latches The device can operate as a feed-
through transceiver or it can generate check parity from the
8-bit data busses in either direction The 鈥橝C 鈥橝CT899 fea-
tures independent latch enables for the A-to-B direction and
the B-to-A direction a select pin for ODD EVEN parity and
separate error signal output pins for checking parity
Features
Y
Y
Y
Y
Y
Y
Y
Y
Y
Latchable transceiver with output sink of 24 mA
Option to select generate parity and check or 鈥樷€榝eed-
through鈥欌€?data parity in directions A-to-B or B-to-A
Independent latch enable for A-to-B and B-to-A direc-
tions
Select pin for ODD EVEN parity
ERRA and ERRB output pins for parity checking
Ability to simultaneously generate and check parity
May be used in system applications in place of the 鈥?80
May be used in system applications in place of the 鈥?57
and 鈥?73 (no need to change T R to check parity)
4 kV minimum ESD immunity
Logic Symbol
Connection Diagram
Pin Assignment for PCC and LCC
TL F 10637 鈥?1
TL F 10637 鈥?2
TRI-STATE is a registered trademark of National Semiconductor Corporation
FACT
TM
is a trademark of National Semiconductor Corporation
C
1995 National Semiconductor Corporation
TL F 10637
RRD-B30M75 Printed in U S A