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t
PHL
OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 4.5V to 5.5V
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 273
IMPROVED LATCH-UP IMMUNITY
M
(Micro Package)
B
(Plastic Package)
ORDER CODES :
74ACT273B
74ACT273M
74ACT273T
T
(TSSOP Package)
DESCRIPTION
The ACT273 is a high-speed CMOS OCTAL
D-TYPE FLIP FLOP WITH CLEAR fabricated
with sub-micron silicon gate and double-layer
metal wiring C
2
MOS technology. It is ideal for low
power applications mantaining high speed
operation similar to equivalent Bipolar Schottky
TTL.
Information signals applied to D inputs are
transfered to the Q output on the positive going
edge of the clock pulse.
When the CLEAR input is held low, the Q outputs
are held low independentely of the other inputs .
The device is designed to interface directly High
Speed CMOS systems with TTL, NMOS and
CMOS output voltage levels.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
PIN CONNECTION AND IEC LOGIC SYMBOLS
May 1999
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