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74ACT16861DLR Datasheet

  • 74ACT16861DLR

  • 20-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS

  • 7頁

  • TI

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54ACT16861, 74ACT16861
20-BIT BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCAS197B 鈥?JUNE 1990 鈥?REVISED NOVEMBER 1996
D
D
D
D
D
D
D
D
Members of the Texas Instruments
Widebus
鈩?/div>
Family
Inputs Are TTL-Voltage Compatible
3-State Outputs Drive Bus Lines Directly
Flow-Through Architecture Optimizes
PCB Layout
Distributed V
CC
and GND Pin Configuration
Minimizes High-Speed Switching Noise
EPIC
鈩?/div>
(Enhanced-Performance Implanted
CMOS) 1-碌m Process
500-mA Typical Latch-Up Immunity at
125擄C
Package Options Include Shrink Plastic
Small-Outline 300-mil (DL) Packages Using
25-mil Center-to-Center Pin Spacings and
380-mil Fine-Pitch Ceramic Flat (WD)
Packages Using 25-mil Center-to-Center
Pin Spacings
54ACT16861 . . . WD PACKAGE
74ACT16861 . . . DL PACKAGE
(TOP VIEW)
description
The 鈥橝CT16861 are noninverting 20-bit
transceivers
designed
for
asynchronous
communication between data buses. The
control-function
implementation
minimizes
external timing requirements.
The 鈥橝CT16861 can be used as two 10-bit
transceivers or one 20-bit transceiver. They allow
data transmission from the A bus to the B bus or
from the B bus to the A bus, depending upon the
logic level at the output-enable (OEAB or OEBA)
inputs. The output-enable inputs can be used to
disable the device so that the buses are effectively
isolated.
1OEAB
1B1
1B2
GND
1B3
1B4
V
CC
1B5
1B6
1B7
GND
1B8
1B9
1B10
2B1
2B2
2B3
GND
2B4
2B5
2B6
V
CC
2B7
2B8
GND
2B9
2B10
2OEAB
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
1OEBA
1A1
1A2
GND
1A3
1A4
V
CC
1A5
1A6
1A7
GND
1A8
1A9
1A10
2A1
2A2
2A3
GND
2A4
2A5
2A6
V
CC
2A7
2A8
GND
2A9
2A10
2OEBA
The 74ACT16861 is packaged in TI鈥檚 shrink small-outline package, which provides twice the I/O pin count and
functionality of standard small-outline packages in the same printed-circuit-board area.
The 54ACT16861 is characterized for operation over the full military temperature range of 鈥?5擄C to 125擄C. The
74ACT16861 is characterized for operation from 鈥?0擄C to 85擄C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC and Widebus are trademarks of Texas Instruments Incorporated.
UNLESS OTHERWISE NOTED this document contains PRODUCTION
DATA information current as of publication date. Products conform to
specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all
parameters.
POST OFFICE BOX 655303
Copyright
1996, Texas Instruments Incorporated
鈥?/div>
DALLAS, TEXAS 75265
1

74ACT16861DLR 產(chǎn)品屬性

  • 1,000

  • 集成電路 (IC)

  • 邏輯 - 緩沖器,驅(qū)動器,接收器,收發(fā)器

  • 74ACT

  • 收發(fā)器,非反相

  • 2

  • 10

  • 24mA,24mA

  • 4.5 V ~ 5.5 V

  • -40°C ~ 85°C

  • 表面貼裝

  • 56-BSSOP(0.295",7.50mm 寬)

  • 56-SSOP

  • 帶卷 (TR)

  • 296-4211-2

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