74ACT16240 16-Bit Inverting Buffer/Line Driver with 3-STATE Outputs
August 1999
Revised October 1999
74ACT16240
16-Bit Inverting Buffer/Line Driver with 3-STATE Outputs
General Description
The ACT16240 contains sixteen inverting buffers with 3-
STATE outputs designed to be employed as a memory and
address driver, clock driver, or bus-oriented transmitter/
receiver. The device is nibble controlled. Each nibble has
separate 3-STATE control inputs which can be shorted
together for full 16-bit operation.
Features
s
Separate control logic for each byte
s
16-bit version of the ACT240
s
Outputs source/sink 24 mA
s
TTL-compatible inputs
Ordering Code:
Order Number
74ACT16240SSC
74ACT16240MTD
Package Number
MS48A
MTD48
Package Description
48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300鈥?Wide
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Device also available in Tape and Reel. Specify by appending suffix letter 鈥淴鈥?to the ordering code.
Logic Symbol
Connection Diagram
Pin Descriptions
Pin Names
OE
n
I
0
鈥揑
15
O
0
鈥揙
15
Description
Output Enable Inputs (Active LOW)
Inputs
Outputs
FACT鈩?is a trademark of Fairchild Semiconductor Corporation.
漏 1999 Fairchild Semiconductor Corporation
DS500293
www.fairchildsemi.com