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(Enhanced-Performance Implanted
CMOS) 1-碌m Process
500-mA Typical Latch-Up Immunity at 125擄C
Package Options Include Plastic
Small-Outline Packages and Standard
Plastic 300-mil DIPs
DW OR NT PACKAGE
(TOP VIEW)
A/Q
A
B/Q
B
C/Q
C
D/Q
D
GND
GND
GND
GND
E/Q
E
F/Q
F
G/Q
G
H/Q
H
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
CCK
CCLR
CCKEN
CCKEN
CLOAD
V
CC
V
CC
OE
OE
RCK
RCK
RCO
description
The 74ACT11593 contains eight multiplexed parallel I/Os with 3-state output capability and an 8-bit storage
register that feeds an 8-bit binary counter. Both the register and the counter have individual positive-edge
triggered clocks.
The function tables show the operation of the counter clock-enable (CCKEN, CCKEN) and output-enable
(OE, OE) inputs.
The counter input has direct load and clear functions. A low-going RCO pulse is obtained when the counter
reaches the hex word FF.
Expansion is easily accomplished for two stages by connecting RCO of the first stage to CCKEN of the second
stage. Cascading for larger count chains is accomplished by connecting RCO of each stage to CCK of the
following stage.
The 74ACT11593 is characterized for operation from 鈥?40擄C to 85擄C.
Function Tables
COUNTER CLOCK ENABLE
INPUTS
CCKEN
L
L
H
H
CCKEN
L
H
L
H
OUTPUTS
A/QA THRU H/QH
Disable
Disable
Enable
Disable
OE
L
L
H
H
OUTPUT ENABLE
INPUTS
OE
L
H
L
H
OUTPUTS
A/QA THRU H/QH
Input mode
Input mode
Output mode
Input mode
EPIC is a trademark of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright
漏
1993, Texas Instruments Incorporated
POST OFFICE BOX 655303
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DALLAS, TEXAS 75265
2鈥?
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