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74ACT08B Datasheet

  • 74ACT08B

  • QUAD 2-INPUT AND GATE

  • 175.84KB

  • 8頁

  • STMICROELECTRONICS   STMICROELECTRONICS

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74ACT08
QUAD 2-INPUT
AND
GATE
s
s
s
s
s
s
s
s
s
HIGH SPEED: t
PD
= 4.5ns (TYP.) at V
CC
= 5V
LOW POWER DISSIPATION:
I
CC
= 2碌A(MAX.) at T
A
=25擄C
COMPATIBLE WITH TTL OUTPUTS
V
IH
= 2V (MIN.), V
IL
= 0.8V (MAX.)
50鈩?TRANSMISSION LINE DRIVING
CAPABILITY
SYMMETRICAL OUTPUT IMPEDANCE:
|I
OH
| = I
OL
= 24mA (MIN)
BALANCED PROPAGATION DELAYS:
t
PLH
鈮?/div>
t
PHL
OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 4.5V to 5.5V
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 08
IMPROVED LATCH-UP IMMUNITY
DIP
SOP
TSSOP
ORDER CODES
PACKAGE
DIP
SOP
TSSOP
TUBE
74ACT08B
74ACT08M
T&R
74ACT08MTR
74ACT08TTR
DESCRIPTION
The 74ACT08 is an advanced high-speed CMOS
QUAD 2-INPUT AND GATE fabricated with
sub-micron silicon gate and double-layer metal
wiring C
2
MOS tecnology.
The internal circuit is composed of 2 stages
including buffer output, which enables high noise
immunity and stable output.
The device is designed to interface directly High
Speed CMOS systems with TTL, NMOS and
CMOS output voltage levels.
All inputs and outputs are equipped with protec-
tion circuits against static discharge, giving them
2KV ESD immunity and transient excess voltage.
PIN CONNECTION AND IEC LOGIC SYMBOLS
April 2001
1/8

74ACT08B 產(chǎn)品屬性

  • STMicroelectronics

  • AND

  • 74ACT

  • Quad

  • 2 / 1

  • - 24 mA

  • 24 mA

  • 8 ns

  • 5.5 V

  • 4.5 V

  • + 125 C

  • Through Hole

  • PDIP-14

  • Tube

  • - 55 C

  • 2

  • 1

  • 25

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