buffered common Output Enable (OE). The information
LOW-to-HIGH clock (CP) transition.
threshold performance. FACT Quiet Series features GTO錚?/div>
output control and undershoot corrector in addition to a
split ground bus for superior performance.
The ACQ/ACTQ574 is functionally identical to the
ACTQ374 but with different pin-out.
Features
s
I
CC
and I
OZ
reduced by 50%
s
Guaranteed simultaneous switching noise level and
dynamic threshold performance
s
Guaranteed pin-to-pin skew AC performance
s
Inputs and outputs on opposite sides of the package
allowing easy interface with microprocessors
s
Functionally identical to the ACQ/ACTQ374
s
3-STATE outputs drive bus lines or buffer memory
address registers
s
Outputs source/sink 24 mA
s
Faster prop delays than the standard AC/ACT574
Ordering Code:
Order Number
74ACQ574SC
74ACQ574SJ
74ACQ574PC
74ACTQ574SC
74ACTQ574SJ
74ACTQ574PC
Package Number
M20B
M20D
N20A
M20B
M20D
N20A
Package Description
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300鈥?Wide Body
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300鈥?Wide
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300鈥?Wide Body
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300鈥?Wide
Device also available in Tape and Reel. Specify by appending suffix 鈥淴鈥?to the ordering code.
Connection Diagram
Pin Descriptions
Pin Names
D
0
鈥揇
7
CP
OE
O
0
鈥揙
7
Data Inputs
Clock Pulse Input
3-STATE Output Enable Input
3-STATE Outputs
Description
FACT錚? Quiet Series錚? FACT Quiet Series錚?and GTO錚?are trademarks of Fairchild Semiconductor Corporation.
漏 1999 Fairchild Semiconductor Corporation
DS010634
www.fairchildsemi.com