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74ACTQ573MTCX Datasheet

  • 74ACTQ573MTCX

  • 8-Bit D-Type Latch

  • 12頁

  • ETC

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74ACQ573 鈥?74ACTQ573 Quiet Series錚?Octal Latch with 3-STATE Outputs
January 1990
Revised October 2000
74ACQ573 鈥?74ACTQ573
Quiet Series
錚?/div>
Octal Latch with 3-STATE Outputs
General Description
The ACQ/ACTQ573 is a high-speed octal latch with buff-
ered common Latch Enable (LE) and buffered common
Output Enable (OE) inputs. The ACQ/ACTQ573 is func-
tionally identical to the ACQ/ACTQ373 but with inputs and
outputs on opposite sides of the package. The ACQ/ACTQ
utilizes Fairchild鈥檚 Quiet Series
錚?/div>
technology to guarantee
quiet output switching and improved dynamic threshold
performance. FACT Quiet Series
錚?/div>
features GTO
錚?/div>
output
control and undershoot corrector in addition to a split
ground bus for superior performance.
Features
s
I
CC
and I
OZ
reduced by 50%
s
Guaranteed simultaneous switching noise level and
dynamic threshold performance
s
Guaranteed pin-to-pin skew AC performance
s
Improved latch-up immunity
s
Inputs and outputs on opposite sides of package allow
easy interface with microprocessors
s
Outputs source/sink 24 mA
Ordering Code:
Order Number
74ACQ573SC
74ACQ573SJ
74ACQ573MTC
74ACQ573PC
74ACTQ573SC
74ACTQ573SJ
74ACTQ573QSC
74ACTQ573MTC
74ACTQ573PC
Package Number
M20B
M20D
MTC20
N20A
M20B
M20D
MQA20
MTC20
N20A
Package Description
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150 Wide
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Device also available in Tape and Reel. Specify by appending suffix letter 鈥淴鈥?to the ordering code.
Logic Symbols
IEEE/IEC
Connection Diagram
Pin Descriptions
Pin Names
D
0
鈥揇
7
LE
OE
O
0
鈥揙
7
Description
Data Inputs
Latch Enable Input
3-STATE Output Enable Input
3-STATE Latch Outputs
FACT錚? Quiet Series錚? FACT Quiet Series錚? and GTO錚?are trademarks of Fairchild Semiconductor Corporation
漏 2000 Fairchild Semiconductor Corporation
DS010633
www.fairchildsemi.com

74ACTQ573MTCX 產(chǎn)品屬性

  • 2,500

  • 集成電路 (IC)

  • 邏輯 - 鎖銷

  • 74ACTQ

  • D 型透明鎖存器

  • 8:8

  • 三態(tài)

  • 4.5 V ~ 5.5 V

  • 1

  • 6.5ns

  • 24mA，24mA

  • -40°C ~ 85°C

  • 表面貼裝

  • 20-TSSOP（0.173"，4.40mm 寬）

  • 20-TSSOP

  • 帶卷 (TR)

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