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74AC280SCX Datasheet

  • 74AC280SCX

  • Parity Generator/Checker

  • 68.23KB

  • 6頁(yè)

  • FAIRCHILD

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74AC280 9-Bit Parity Generator/Checker
November 1988
Revised November 1999
74AC280
9-Bit Parity Generator/Checker
General Description
The AC280 is a high-speed parity generator/checker that
accepts nine bits of input data and detects whether an
even or an odd number of these inputs is HIGH. If an even
number of inputs is HIGH, the Sum Even output is HIGH. If
an odd number is HIGH, the Sum Even output is LOW. The
Sum Odd output is the complement of the Sum Even out-
put.
Features
s
I
CC
reduced by 50%
s
9-bit width for memory applications
s
AC280: 5962-92201
Ordering Code:
Order Number
74AC280SC
74AC280SJ
Package Number
M14A
M14D
Package Description
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150鈥?Narrow Body
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Devices also available in Tape and Reel. Specify by appending suffix letter 鈥淴鈥?to the ordering code.
Logic Symbols
Connection Diagram
IEEE/IEC
Truth Table
Pin Descriptions
Pin Names
I
0
鈥揑
8
鈭?/div>
螣
鈭?/div>
螘
Description
Data Inputs
Odd Parity Output
Even Parity Output
Number of
HIGH Inputs
I
0
鈥揑
8
0, 2, 4, 6, 8
1, 3, 5, 7, 9
H
=
HIGH Voltage Level
L
=
LOW Voltage Level
Outputs
鈭?/div>
Even
H
L
鈭?/div>
Odd
L
H
FACT錚?is a trademark of Fairchild Semiconductor Corporation.
漏 1999 Fairchild Semiconductor Corporation
DS009955
www.fairchildsemi.com

74AC280SCX 產(chǎn)品屬性

  • 2,500

  • 集成電路 (IC)

  • 邏輯 - 奇偶校驗(yàn)發(fā)生器和校驗(yàn)器

  • 74AC

  • 奇偶校驗(yàn)發(fā)生器/校驗(yàn)器

  • 9 位

  • 24mA，24mA

  • 2 V ~ 6 V

  • -40°C ~ 85°C

  • 表面貼裝

  • 14-SOIC（0.154"，3.90mm 寬）

  • 14-SOIC

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