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Generates Either Odd or Even Parity for
Nine Data Lines
Cascadable for n-Bits Parity
Direct Bus Connection for Parity
Generation or for Checking by Using the
Parity I/O Port
Flow-Through Architecture Optimizes
PCB Layout
Center-Pin V
CC
and GND Configurations
Minimize High-Speed Switching Noise
EPIC
(Enhanced-Performance Implanted
CMOS) 1-
m
m Process
500-mA Typical Latch-Up Immunity
at 125擄C
Package Options Include Plastic
Small-Outline Packages and Standard
Plastic 300-mil DIPs
D OR N PACKAGE
(TOP VIEW)
B
A
PARITY I/O
GND
PARITY ERROR
XMIT
I
1
2
3
4
5
6
7
14
13
12
11
10
9
8
C
D
E
V
CC
F
G
H
t
description
The 74AC11286 universal 9-bit parity generator/checker features a local output for parity checking and a
bus-driving parity I/O port for parity generation/checking. The word-length capability is easily expanded by
cascading.
The XMIT control input is implemented specifically to accommodate cascading. When the XMIT is low, the parity
tree is disabled and the PARITY ERROR output will remain at a high logic level regardless of the input levels.
When XMIT is high, the parity tree is enabled. The PARITY ERROR output will indicate a parity error when either
an even number of inputs (A through I) are high and PARITY I/O is forced to a low logic level, or when an odd
number of inputs are high and PARITY I/O is forced to a high logic level.
The I/O control circuitry was designed so that the I/O port will remain in the high-impedance state during power
up or power down to prevent bus glitches.
The 74AC11286 is characterized for operation from 鈥?40擄C to 85擄C.
FUNCTION TABLE
NUMBER OF INPUTS
(A THRU I) THAT
ARE HIGH
0, 2, 4, 6, 8
1, 3, 5, 7, 9
0, 2 4 6
0 2, 4, 6, 8
1, 3 5 7
1 3, 5, 7, 9
h 鈥?high input level
H 鈥?high output level
XMIT
INPUT
l
l
h
h
h
h
PARITY
I/O
H
L
h
l
h
l
PARITY
ERROR
OUTPUT
H
H
H
L
L
H
l 鈥?low input level
L 鈥?low output level
EPIC is a trademark of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright
漏
1993, Texas Instruments Incorporated
POST OFFICE BOX 655303
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DALLAS, TEXAS 75265
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