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Designed Specifically for High-Speed
Memory Decoders and Data Transmission
Systems
Noninverting Version of
鈥睞C11138
Incorporates 3 Enable Inputs to Simplify
Cascading and/or Data Reception
Flow-Through Architecture Optimizes
PCB Layout
Center-Pin V
CC
and GND Configurations
Minimize High-Speed Switching Noise
EPIC
(Enhanced-Performance Implanted
CMOS) 1-
m
m Process
500-mA Typical Latch-Up Immunity
at 125擄C
Package Options Include Plastic
Small-Outline Packages, Ceramic Chip
Carriers, and Standard Plastic and Ceramic
300-mil DIPs
54AC11238 . . . J PACKAGE
74AC11238 . . . D OR N PACKAGE
(TOP VIEW)
t
Y1
Y2
Y3
GND
Y4
Y5
Y6
Y7
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
Y0
A
B
C
V
CC
G1
G2A
G2B
54AC11238 . . . FK PACKAGE
(TOP VIEW)
description
The
鈥睞C11238
circuit is designed to be
15
7
used in high-performance memory-decoding or
14
8
data-routing applications requiring very short
9 10 11 12 13
propagation delay times. In high-performance
memory systems, this decoder can be used to
minimize the effects of system decoding. When
employed with high-speed memories utilizing a
NC 鈥?No internal connection
fast enable circuit, the delay times of this decoder
and the enable time of the memory are usually less than the typical access time of the memory. This means that
the effective system delay introduced by the decoder is negligible.
The conditions at the binary select inputs and the three enable inputs select one of eight input lines. Two
active-low and one active-high enable inputs reduce the need for external gates or inverters when expanding.
A 24-line decoder can be implemented without external inverters and a 32-line decoder requires only one
inverter. An enable input can be used as a data input for demultiplexing applications.
The 54AC11238 is characterized for operation over the full military temperature range of 鈥?55擄C to 125擄C. The
74AC11238 is characterized for operation from 鈥?40擄C to 85擄C.
Y3
GND
NC
Y4
Y5
A
Y0
NC
Y1
Y2
4
5
6
3 2 1 20 19
18
17
16
B
C
NC
V
CC
G1
G2A
G2B
NC
Y7
Y6
Copyright
漏
1993, Texas Instruments Incorporated
EPIC is a trademark of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily
include testing of all parameters.
POST OFFICE BOX 655303
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DALLAS, TEXAS 75265
2鈥?
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