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74AC11032N Datasheet

  • 74AC11032N

  • QUADRUPLE 2-INPUT POSITIVE-OR GATE

  • 79.17KB

  • 5頁

  • TI

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74AC11032
QUADRUPLE 2-INPUT POSITIVE-OR GATE
SCAS007C 鈥?JULY 1987 鈥?REVISED APRIL 1996
D
D
D
D
Center-Pin V
CC
and GND Configurations
Minimize High-Speed Switching Noise
EPIC
鈩?/div>
(Enhanced-Performance Implanted
CMOS) 1-碌m Process
500-mA Typical Latch-Up Immunity at
125擄C
Package Options Include Plastic
Small-Outline (D) and Shrink Small-Outline
(DB) Packages, and Standard Plastic
300-mil DIPs (N)
D, DB, OR N PACKAGE
(TOP VIEW)
1A
1Y
2Y
GND
GND
3Y
4Y
4B
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
1B
2A
2B
V
CC
V
CC
3A
3B
4A
description
This device contains four independent 2-input OR gates. It performs the Boolean function
Y
+
A
)
B or Y
+
A
鈥?/div>
B
in positive logic.
The 74AC11032 is characterized for operation from 鈥?0擄C to 85擄C.
FUNCTION TABLE
(each gate)
INPUTS
A
H
X
L
B
X
H
L
OUTPUT
Y
H
H
L
logic symbol
鈥?/div>
1A
1B
2A
2B
3A
3B
4A
4B
1
16
15
14
11
10
9
8
7
4Y
6
3Y
3
2Y
鈮?
2
1Y
鈥?This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC is a trademark of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright
漏
1996, Texas Instruments Incorporated
POST OFFICE BOX 655303
鈥?/div>
DALLAS, TEXAS 75265
1

74AC11032N 產(chǎn)品屬性

  • 25

  • 集成電路 (IC)

  • 邏輯 - 柵極和逆變器

  • 74AC

  • 或門

  • 4

  • 2

  • -

  • 3 V ~ 5.5 V

  • 4µA

  • 24mA，24mA

  • 0.9 V ~ 1.65 V

  • 2.1 V ~ 3.85 V

  • 6.2ns @ 5V，50pF

  • -40°C ~ 85°C

  • 通孔

  • 16-PDIP

  • 16-DIP（0.300"，7.62mm）

  • 管件

  • 296-4158-5

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