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74AC11020 Datasheet

  • 74AC11020

  • DUAL 4-INPUT POSITIVE-NAND GATES

  • 5頁(yè)

  • TI

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54AC11020, 74AC11020
DUAL 4-INPUT POSITIVE-NAND GATES
SCAS154 鈥?MARCH 1987 鈥?REVISED APRIL 1993
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
Flow-Through Architecture Optimizes
PCB Layout
Center-Pin V
CC
and GND Configurations
Minimize High-Speed Switching Noise
EPIC
鈩?/div>
(Enhanced-Performance Implanted
CMOS) 1-碌m Process
500-mA Typical Latch-Up Immunity
at 125擄C
Package Options Include Plastic
Small-Outline Packages, Ceramic Chip
Carriers, and Standard Plastic and Ceramic
300-mil DIPs
54AC11020 . . . J PACKAGE
74AC11020 . . . D OR N PACKAGE
(TOP VIEW)
1B
1A
1Y
GND
2Y
2D
2C
1
2
3
4
5
6
7
14
13
12
11
10
9
8
NC
1C
1D
V
CC
2A
2B
NC
description
These devices contain two independent 4-input
NAND gates. They perform the Boolean functions
Y = A
鈥?/div>
B
鈥?/div>
C
鈥?/div>
D or Y = A + B + C + D in positive
logic.
The 54AC11020 is characterized for operation
over the full military temperature range of 鈥?55擄C
to 125擄C. The 74AC11020 is characterized for
operation from 鈥?40擄C to 85擄C.
54AC11020 . . . FK PACKAGE
(TOP VIEW)
NC
NC
1B
NC
1A
4
5
6
7
8
3 2 1 20 19
18
17
16
15
14
9 10 11 12 13
1C
1D
NC
V
CC
2A
2B
NC
NC
NC
2C
NC 鈥?No internal connection
C
H
X
X
L
X
D
H
X
X
X
L
OUTPUT
Y
L
H
H
H
H
FUNCTION TABLE
(each gate)
INPUTS
A
H
L
X
X
X
B
H
X
L
X
X
EPIC is a trademark of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303
鈥?/div>
DALLAS, TEXAS 75265
1Y
GND
NC
2Y
2D
Copyright
漏
1993, Texas Instruments Incorporated
2鈥?

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