74ABT3284 18-Bit Synchronous Datapath Multiplexer
October 1995
74ABT3284
18-Bit Synchronous Datapath Multiplexer
General Description
The 74ABT3284 is a synchronous datapath buffer designed
to transmit four 9-bit bytes of data onto one or two 9-bit
bytes in 2 1 or 4 1 multiplexed configurations In addition
the non-inverting transceiver supports bidirectional data
transfer in transparent or registered modes A data byte
from any one of the six ports can be stored during transpar-
ent operation for later recall Data input to any port may also
be read back to itself for byte manipulation or system self-di-
agnostic purposes
The 74ABT3284 is useful for interleaving data in memory
applications or for use in bus-to-bus communications where
variations in data word length or construction are required
Y
Y
Y
Y
Y
Y
Y
Y
Y
18-bit 2 1 or 9-bit 4 1 multiplexed modes
Registered or transparent datapath operation
Output enables and select lines have the option of be-
ing synchronized for pipelined operation
Independent input output register and control synchro-
nizing clocks insure maximum timing flexibility
Independent control signals insure functional flexibility
Guaranteed simultaneous switching noise level and
dynamic threshold performance
Guaranteed latchup protection
High impedance glitch free bus loading during entire
power up and power down cycle
Non-destructive hot insertion capability
Features
Y
Advanced BiCMOS technology provides high speed at
low power consumption
Commercial
74ABT3284VJG
Package Number
VJG100A
Package Description
100-Lead (14mm x 14mm) Molded Plastic Quad Flatpak JEDEC
Connection Diagram
Pin Assignment
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
Mode SO
CP AX
OEC
LDCI
LDCO
SA
2
X
1
SA
2
X
0
X
0
X
1
GND
X
2
X
3
X
4
X
5
X
6
GND
X
7
X
8
OEX
XSEL
0
XSEL
1
LDAO
LDAI
OEA
V
CC
Pin
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
V
CC
A
8
A
7
A
6
GND
A
5
A
4
A
3
A
2
GND
A
1
A
0
V
CC
B
0
B
1
GND
B
2
B
3
B
4
B
5
GND
B
6
B
7
B
8
V
CC
Pin
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
CP IN
OEB
LDBI
LDBO
Mode W
YSEL
OEY
Y
8
Y
7
GND
Y
6
Y
5
Y
4
Y
3
Y
2
GND
Y
1
Y
0
LDDO
LDDI
ASEL1
ASEL0
OED
CP XA
Mode SC
Pin
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
V
CC
D
8
D
7
D
6
GND
D
5
D
4
D
3
D
2
GND
D
1
D
0
V
CC
C
0
C
1
GND
C
2
C
3
C
4
C
5
GND
C
6
C
7
C
8
V
CC
TL F 11582鈥?
TRI-STATE is a registered trademark of National Semiconductor Corporation
C
1995 National Semiconductor Corporation
TL F 11582
RRD-B30M125 Printed in U S A