Philips Semiconductors
Product specification
Dual 4-input NAND gate
74ABT20
QUICK REFERENCE DATA
SYMBOL
PARAMETER
Propagation
delay
An, Bn, Cn, Dn
to Yn
Output to
Output skew
Input
capacitance
Total supply
current
V
I
= 0V or V
CC
Outputs disabled;
V
CC
= 5.5V
CONDITIONS
T
amb
= 25擄C;
GND = 0V
TYPICAL
UNIT
LOGIC DIAGRAM
A0
B0
1
2
6
4
5
Y0
t
PLH
t
PHL
t
OSLH
t
OSHL
C
IN
I
CC
C
L
= 50pF;
V
CC
= 5V
2.7
2.2
0.3
3
50
C0
ns
D0
ns
pF
碌A(chǔ)
V
CC
= Pin 14
GND = Pin 7
A1
B1
C1
D1
9
10
8
12
13
Y1
SA00352
PIN CONFIGURATION
A0
B0
NC
C0
D0
Y0
GND
1
2
3
4
5
6
7
14
13
12
11
10
9
8
V
CC
D1
C1
NC
B1
A1
Y1
LOGIC SYMBOL (IEEE/IEC)
1
2
6
4
5
&
9
SA00350
10
8
12
13
PIN DESCRIPTION
PIN
NUMBER
1, 2, 4, 5, 9,
10, 12, 13
6, 8
7
14
SYMBOL
An, Bn,
Cn, Dn
Yn
GND
V
CC
NAME AND FUNCTION
SF00068
Data inputs
Data outputs
Ground (0V)
Positive supply voltage
FUNCTION TABLE
INPUTS
An
L
X
X
X
Bn
X
L
X
X
Cn
X
X
L
X
H
Dn
X
X
X
L
H
OUTPUT
Yn
H
H
H
H
L
LOGIC SYMBOL
1
2
4
5
9
10
12
13
A0
B0
C0 D0
A1
B1
C1
D1
Y0 Y1
V
CC
= Pin 14
GND = Pin 7
6
8
H
H
NOTES:
H = High voltage level
L = Low voltage level
X = Don鈥檛 care
SA00351
ORDERING INFORMATION
PACKAGES
14-Pin Plastic DIP
14-Pin plastic SO
14-Pin Plastic SSOP Type II
14-Pin Plastic TSSOP Type I
TEMPERATURE RANGE
鈥?0擄C to +85擄C
鈥?0擄C to +85擄C
鈥?0擄C to +85擄C
鈥?0擄C to +85擄C
OUTSIDE NORTH AMERICA
74ABT20 N
74ABT20 D
74ABT20 DB
74ABT20 PW
NORTH AMERICA
74ABT20 N
74ABT20 D
74ABT20 DB
74ABT20PW DH
DWG NUMBER
SOT27-1
SOT108-1
SOT337-1
SOT402-1
1995 Sep 22
1
853-1811 15793