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5962-9096503Q9A Datasheet

  • 5962-9096503Q9A

  • FPGA

  • 25頁(yè)

  • ETC

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REVISIONS
LTR
A
B
C
D
DESCRIPTION
Add device type 02; editorial changes throughout. Redrawn.
Update boilerplate. Add device types 03 and 04. Add case outline
M. Editorial changes throughout.
Add 05 device. Removed some parameters from table IIB. Updated
boilerplate. ksr
Added equation to footnote 2/, made corrections to table IB.
Changed sample size in paragraph 4.4.1. Removed (Dose Rate
Induced latchup testing) and (Dose Rate Upset testing) paragraphs.
Updated boilerplate. ksr
Change 1.3 Maximum junction temperature from 175

C to 150

C.
Added footnote 2/ to Figure 2 for the T and M case outlines. Add die
information per Appendix A. ksr
DATE
(YR-MO-DA)
93-06-23
94-06-30
98-04-06
98-07-10
APPROVED
M. A. Frye
M. A. Frye
Raymond Monnin
Raymond Monnin
E
98-09-21
Raymond Monnin
REV
SHEET
REV
SHEET
REV STATUS
OF SHEETS
E
15
E
16
E
17
E
18
REV
SHEET
E
19
E
20
E
21
E
1
E
22
E
2
E
23
E
3
E
4
E
5
E
6
E
7
E
8
E
9
E
10
E
11
E
12
E
13
E
14
PMIC N/A
PREPARED BY
TIM H. NOH
CHECKED BY
KENNETH RICE
STANDARD
MICROCIRCUIT
DRAWING
THIS DRAWING IS
AVAILABLE
FOR USE BY ALL
DEPARTMENTS
AND AGENCIES OF THE
DEPARTMENT OF DEFENSE
AMSC N/A
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 42316
APPROVED BY
TIM H. NOH
DRAWING APPROVAL DATE
92-06-23
REVISION LEVEL
E
MICROCIRCUIT, MEMORY, DIGITAL, , CMOS,
FIELD PROGRAMMABLE GATE ARRAY,
2000 GATES,MONOLITHIC SILICON
SIZE
CAGE CODE
A
SHEET
67268
1
OF
23
5962-90965
DSCC FORM 2233
APR 97
DISTRIBUTION STATEMENT A. Approved for public release; distribution is unlimited.
5962-E526-98

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